Research Groups

Intel and GlobalFoundries will talk about their post-14nm finFET-based processes at December's IEDM.

DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.

The major West Coast technical conference for lithography is just two weeks away and offers a packed agenda.

IMEC has claimed at IEDM to have implemented for the first time the CMOS integration of vertically stacked nanowire transistors.

Award-winning paper describes new strategy offering both greater speed and accuracy.

Researchers at the Georgia Institute of Technology adapted conventional 2D layout tools to a two-layer monolithic 3D process that resulted in sizeable space and power savings.

Deep pipelines and dynamic memory sharing may provide the key to the development of faster and more efficient server-farm blades as the focus in hardware design moves to augmenting conventional processors with specialized accelerators.

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.

Open-source hardware, in-field configurability, and a hardware-plus-services approach could protect margins as the IoT hammers down costs, says GSA report.

Researchers describe at IEDM 2015 how they are making gallium nitride fit into a wider range of power-handling applications and may even result in mass-market vertical transistors.