Research Groups

June 18, 2015

The road to 7nm sees patterning multiply

Is the industry ready to go beyond 10nm when it comes to lithography? Lithography researcher Professor David Pan sees design and process co-operation as the key approach.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,
June 8, 2015

CEA-Leti adds partners to FD-SOI low-power design centre

Silicon Impulse program adds partners to ease industrialisation of ultra-low power IC designs based on FD-SOI processes
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: , ,
May 11, 2015

VLSI Symposia delve into future process choices

Intel 14nm finFET SoC process is among the highlights of the 2015 VLSI Symposia alongside research that looks at the integration of III-V and 2D materials for future processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 12, 2015

Cea-Leti opens FD-SOI design center

CEA-Leti has launched a design center called Silicon Impulse with the intention of lowering the entry barrier to using the FD-SOI process.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
March 11, 2015

IoT and RF ‘to drive FD-SOI adoption’

The FD-SOI technology developed by CEA-Leti and STMicroelectronics is beginning to gain ground as chipmakers investigate the process as a way to deliver low-energy, wireless-capable SoCs.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , ,
March 11, 2015

Charting out the roadmap for FD-SOI

As plans crystallize to take FD-SOI down to 10nm, CEA-Leti argues that the technology can provide an alternative path to that of finFETs to get to 7nm processes and beyond.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , ,
January 7, 2015

CEA-Leti deals with heat issue on monolithic 3DIC

At IEDM 2014, CEA-Leti presented a technique that prevents damage to base-layer transistors in monolithic 3DIC processes. As work progresses, the institute is preparing to receive 3DIC designs in 2017.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: ,
October 28, 2014

imec and Coventor partner for 7nm process development

Process development alliance will enable Imec to experiment on 10 and 7nm processes in the computer before moving to the fab
Article  |  Topics: Design to Silicon  |  Tags: , , , ,   |  Organizations: ,
September 11, 2014

TSMC: e-beam winning on cost over EUV for lithography

EUV may be getting most R&D cash but the world's biggest foundry says e-beam currently has the edge on defects and double patterning.
Article  |  Topics: Design to Silicon, Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , , ,
August 9, 2014

IoT faces interoperability problems

Despite the swirl of interest in the internet of things progress is likely to be held back by interoperability issues according to speakers at the recent NI Week conference.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: , ,

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