Cadence uses reinforcement learning to tune flow
Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.
place and route
From iterative to in-design DRC and debug for place and route
Learn how Calibre RealTime Digital allows you to identify, explore and fix DRC violations as you go.
How MaxLinear cut physical verification time with in-design DRC
A case study describes how the RF and AMS specialist achieved efficiencies on a complex server DSP SoC project by running as-you-go DRC during place and route.
Aprisa team to be doubled after Mentor purchase
Mentor, a Siemens business, plans to expand the team working on the Aprisa place-and-route tool following the purchase of Avatar Integrated Systems, announced in July.
On-demand DRC within P&R cuts closure time in half for MaxLinear
Case study describes how RF/AMS specialist used Calibre RealTime Digital within its flow for a high-end DSP SoC.
EDA with ‘AI inside’ – Mentor’s Joe Sawicki offers an insider’s view
Mentor has a host of tools - some public, some not - that leverage AI and ML. EVP Joe Sawicki has been describing the strategy behind their development.
Synopsys fuses synthesis and place-and-route to improve IC design quality and time to results
Fusion Compiler uses a single, scalable data model, updated optimization engines, and an analysis backbone based on the industry's golden sign-off tools.
Case study: Achieving earlier signoff convergence and a ‘shift left’ for P&R at Qualcomm
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Fusion improves timing say Synopsys users
Early-access customers talked about their experiences with the Synopsys Fusion-based flow in a panel session at the DAC.
GlobalFoundries plays with metal gear in search for solid gains
At VLSI Symposia 2018, GlobalFoundries researchers proposed looking at the metal-gate ‘gear’ ratio as a way of improving the routability of standard cells.
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