Pent-up demand and mis-timed capacity investment could cause rapid IC industry growth.
Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)
Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.
Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
Analyst Rich Valera points to China as a major source of EDA tool growth despite short-term tensions with the US government.
In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
Will discuss how automotive OEMs and chip designers can use AI, deep learning, and convolutional neural networks to achieve better performance than traditional techniques.
The EDA Consortium is rebranding and extending its activities to better reflect all the tools and services that now comprise IC design.
Open-source hardware, in-field configurability, and a hardware-plus-services approach could protect margins as the IoT hammers down costs, says GSA report.
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
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