electromigration


April 10, 2018

Cadence tunes Virtuoso for 5nm and SIP

Cadence Design Systems has made enhancements to its Virtuoso mixed-signal layout tool at both the system-level and nanometer-design levels for its 18.1 release.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations:
January 17, 2017

DesignCon 2017 preview: Mentor Graphics

DesignCon 2017 takes place from Jan 31 to Feb 2 at the Santa Clara Convention Center with its usual focus on PCB design and implementation.
December 7, 2016

Overcoming electromigration analysis limitations for larger on-die power grids

Award-winning paper describes new strategy offering both greater speed and accuracy.
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May 23, 2016

Cloud analysis comes to power grid design

Ansys has decided to marry cloud computing with some of the tools used in SoC design that can make use of large amounts of temporary computer power.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
April 22, 2015

Mentor tool streamlines multi-corner parasitic extraction

Mentor Graphics has launched Calibre xACT, a tool that uses deterministic algorithms to extract parasitics from complex finFET and other nanometer processes.
August 5, 2014

Cadence takes Voltus to transistor level

Cadence Design Systems has introduced a variant of Voltus that runs transistor-level simulations to check for electromigration and IR-drop problems.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:

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