At the recent VLSI Symposium, Google vice president Parthasarathy Ranganathan described the importance of co-design and the software stack in its data-center designs.
CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.
At the VLSI Symposia, researchers described how AI hardware could help dramatically accelerate analog and digital design and not all of it directly through machine learning.
DAC provided a forum for the growing number of verification efforts focused on checking the architectural compliance and overall RTL quality of RISC-V processors.
The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
AI, its system design implications and its impact on EDA tools themselves will be a key theme for ES Design West next month.
Open-source hardware, in-field configurability, and a hardware-plus-services approach could protect margins as the IoT hammers down costs, says GSA report.
Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.
Google has moved to on-body tests of the the smart-lens platform it has been developing for the past few years while the team continues to experiment with embedded LEDs that react to blinks to help warn diabetes sufferers of sudden changes in glucose levels.
Manufacturing giant says we need a new category of WPUs - wearables processing units - to create a mass market and that ARM needs to go smaller than the MO.
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