Cadence has built a unified database to support a group of tools to support the planning and implementation of 3DIC designs.
Building products using chiplets involves more than treating them as hard IP cores. Many open questions surround the field, explored by panelists in a MEPTEC conference online.
A de facto standard for exchanging thermal information about designs has become JEDEC standard JEP181.
Siemens has introduced a cloud-based DFM tool intended to bridge the gap between the electronics design and manufacturing.
Yokogawa's development of a data-recording oscilloscope is built around the ability to connect instruments together and synchronize their measurements.
Design-services company Sondrel is recommending teams start earlier on package design to avoid delays after IC tapeout.
Work by the University of Toronto and Arm presented at IEDM indicates plasmonics could be a viable contender for high-speed chip-chip communications.
Mentor, a Siemens business, has rebranded as Siemens EDA, almost almost four years after the EDA company was acquired.
The free-to-attend user meetings for Mentor clients will retain the same format mixing technical presentations with keynotes and networking.
An RF Laboratories engineer provides some tips and techniques in the context of the PADS Professional suite.
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