Open-source EDA grapples with the incentives issue
As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
hardware accelerator
DAC prepares for winter show
The program for the 58th Design Automation Conference, which returns to a physical format in December, is online and is running its I Love DAC promotion for free access until the end of this month.
Xilinx aims for software flow with Vitis
Xilinx has released the first version of its Vitis development environment as the company aims to capture a user base that is more used to software than hardware tools.
PCI may provide key to OCP chiplet standard
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
Netronome launches chiplet initiative for network-accelerator SIPs
Data-center networking specialist Netronome has recruited a number of silicon makers and IP suppliers to a standard for chiplet designs that can be used in SIPs for edge computers and servers.
Cloud makes hardware acceleration more accessible
After the moves by Cadence and Mentor, emulation in the cloud may only be the start of providing verification acceleration as a service.
Group to build CCIX accelerator test chip
ARM, Xilinx, Cadence Design Systems, and TSMC have agreed to produce a test chip for the CCIX project.
MTAPI library adds patterns for heterogeneous multicore
The latest major release of the EMB2 multicore library introduces C++ wrappers, plugins for GPU programming, and a variety of design patterns
ARM brings security to Cortex-M family
ARM has launched the first of a series of Cortex-M series microcontrollers based on the V8M architecture that incorporate the Trustzone security mechanism.
Achronix moves into embedded FPGA
Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.