IMEC

May 29, 2024

Imec cleans up process for 2µm-pitch 3DIC stacks

Imec has developed cleaner techniques for preparing die-to-wafer bonding components for high-density logic-memory stacks and optical integration.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
May 2, 2024

VLSI to explore vertical device changes and 3nm finFET

The upcoming VLSI Symposium will examine progress in using backside contacts and 3D structures to improve density and speed as well as continuing improvements to finFET processes.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
December 22, 2023

Sustainability work puts numbers on chipmaking production at IEDM

Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , ,
November 14, 2023

Imec makes virtual fab public for green analysis

Imec has a version of its imec.netzero virtual fab tool accessible to the general public with the aim of showing the environmental impact of IC manufacturing.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
July 24, 2023

Backside power shows promise but more complex manufacturing

Backside power delivery could lead to improvements in chip density and more straightforward place-and-route phases according to work presented at this year’s VLSI Symposium.
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June 12, 2023

Air-filled waveguides to cut losses in mass-market radar

AT&S and Imec partnered to develop a way of putting low-loss waveguides into conventional PCBs to support D-band automotive radar and 6G modules.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
December 9, 2022

Imec adds MOL layer to potentially cut cell size 20%

Adding an MOL layer that takes advantage of a self-aligned pitch-splitting technique and a rotated layout could cut standard-cell height to 4T.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
December 5, 2022

Imec pushes endurance on ferro memory at IEDM

Imec has developed a high-endurance ferroelectric capacitor that could form the basis of storag-class embedded and standalone memories.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:
October 17, 2022

2D advances to take center stage at IEDM

At IEDM, TSMC is at the top of several papers that examine how 2D materials might be put into action as successors to silicon, alongside work from a variety of institutions on power integration and thermal management.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , ,
June 1, 2022

Oxide DRAM gains traction at VLSI Symposium

VLSI Symposium 2022 will show the rapid development taking place in oxide-based replacements for traditional DRAM cells as well as the emerging area of memory-based low-power machine learning.

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