DVCon Europe calls for papers for 2024 event
DVCon Europe is looking for papers to be presented at this year’s event in mid-October.
verification
HPC and AI provide keynote focus at DVCon Europe
DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.
Verification Futures heads to the US in September
Tessolve is bringing its Verification Futures conference to the US with an event scheduled for mid-September.
DVCon Europe adds research track
DVCon Europe is expanding coverage into research on design verification for its 10th conference later this year.
Siemens harnesses machine learning for more comprehensive verification
As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
DVCon Europe best paper speeds up memory-controller tests
The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.
Identifying AI opportunities in PCB design
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
DVCon Europe looks to network effects
Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
DVCon Europe keynotes focus on connectivity
DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.
Siemens compiles analog into simulation for faster debug
Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.