verification

October 13, 2021

DVCon events stick with virtual format and add speakers

DVCon US use a virtual platform for its event to be held in the spring and the organisers of the European event will employ a more sophisticated version of the virtual 3D space debuted last year.
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August 5, 2021

Keynotes for DVCon Europe announced

DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
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April 15, 2021

Portable stimulus moves to version 2.0

The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
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March 26, 2021

Siemens brings emulation and prototyping together in hardware-assisted verification

Siemens Digital Industries Software has launched the latest generation of its Veloce hardware-assisted verification systems with a product line that encompasses silicon virtual platform, hardware emulation, and prototyping support.
December 11, 2020

OSVVM updates go into Riviera-Pro

Aldec updates tools to add support for the latest release of the VHDL verification methodology.
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October 15, 2020

DVCon Europe: using all the tools at your disposal

Among the papers that will be presented at the end of October, this year's DVCon Europe will demonstrate the benefits of taking good ideas from wherever you can in the pursuit of more effective verification flows.
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October 8, 2020

DVCon Europe brings virtual rooms to online conference

As part of its move online during the pandemic, DVCon Europe is introducing what the organizers call Virtual Experience Rooms.
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August 17, 2020

Cadence uses machine learning to trim constrained-random runtimes

Cadence has developed a stimulus optimizer based on neural networks to try to improve the runtime of constrained-random verification runs.
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July 27, 2020

Open and propietary verification tools home in on RISC-V core quality

DAC provided a forum for the growing number of verification efforts focused on checking the architectural compliance and overall RTL quality of RISC-V processors.
July 21, 2020

Breker packages up apps for RISC-V, security and AI

Breker has added a number of specialized apps to its library that deal with the verification of RISC-V processors, secure enclaves, and machine-learning designs.
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