verification

January 31, 2023

Siemens harnesses machine learning for more comprehensive verification

As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
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January 6, 2023

DVCon Europe best paper speeds up memory-controller tests

The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.
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December 1, 2022

Identifying AI opportunities in PCB design

The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
November 21, 2022

DVCon Europe looks to network effects

Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
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October 25, 2022

DVCon Europe keynotes focus on connectivity

DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.
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July 12, 2022

Siemens compiles analog into simulation for faster debug

Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.
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April 28, 2022

DVCon Europe returns to live format

DVCon Europe will be held as a live event in Munich in early December.
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March 4, 2022

Verification engineers look to better skills to beat schedules

A panel at DVCon argued too much of a focus on point tools coupled with challenges with interoperability and cross-industry cooperation is hindering the ability of SoC teams to design and verify complex products.
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March 2, 2022

Synopsys talks AI in verification at DVCon

Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.
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December 6, 2021

Imperas pulls together tools for RISC-V verification

Imperas has put together a suite of tools to verify that custom RISC-V processor cores remain compatible with the common infrastructure behind the open-source instruction set.
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