Research Groups

December 15, 2020

Chipmaking’s new environment presented at IEDM

Imec's senior vice president of CMOS outlined future directions for the technology over the coming decade.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
December 4, 2020

Analog surges as cause of IC respins (Wilson Functional Verification 2020 – Part Three)

Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
November 9, 2020

IEDM 2020 highlights transistor and interconnect advances

This year's IEDM will feature papers that exploit stacked nanoribbons to reduce CMOS footprint, graphene interconnects that support easier integration, and the variability prospects of 2D semiconductors.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: , ,
July 21, 2020

3D integration technologies will blend says TSMC chief scientist

DTCO and 3D integration will dominate scaling in the coming decade, TSMC chief scientist Philip Wong claimed in his keynote at DAC on Monday
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: ,
July 13, 2020

Heterogeneous integration calls for new approaches

Heterogeneous integration has the potential to overcome the yield and cost challenges presented by the growing headwinds associated with process scaling. But it may take a dramatic rethink in design approaches.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , , ,   |  Organizations: , , ,
June 16, 2020

Transistor stacks piled high at VLSI

As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , , , , ,   |  Organizations: ,
May 26, 2020

Nanometer scaling puts focus on power at VLSI in June

Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: , , , ,
December 18, 2019

Capacitive link to power cheap wireless tags

Imec, TNO, and Cartamundi have developed a low-cost way of letting tags communicate with embedded devices wirelessly by using a capacitive touchscreen.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , ,   |  Organizations:
October 14, 2019

Integration forms highlights of upcoming IEDM

Different forms of heterogeneous integration take center stage at the IEEE International Electron Device Meeting (IEDM) in December this year.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: , , ,
July 5, 2019
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The road to ES Design West: Design Pavilion

ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.

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