Research Groups

June 12, 2023

Air-filled waveguides to cut losses in mass-market radar

AT&S and Imec partnered to develop a way of putting low-loss waveguides into conventional PCBs to support D-band automotive radar and 6G modules.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
December 9, 2022

Imec adds MOL layer to potentially cut cell size 20%

Adding an MOL layer that takes advantage of a self-aligned pitch-splitting technique and a rotated layout could cut standard-cell height to 4T.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
December 5, 2022

Imec pushes endurance on ferro memory at IEDM

Imec has developed a high-endurance ferroelectric capacitor that could form the basis of storag-class embedded and standalone memories.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:
October 17, 2022

2D advances to take center stage at IEDM

At IEDM, TSMC is at the top of several papers that examine how 2D materials might be put into action as successors to silicon, alongside work from a variety of institutions on power integration and thermal management.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , ,
July 18, 2022

Open-source EDA grapples with the incentives issue

As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
June 1, 2022

Oxide DRAM gains traction at VLSI Symposium

VLSI Symposium 2022 will show the rapid development taking place in oxide-based replacements for traditional DRAM cells as well as the emerging area of memory-based low-power machine learning.
January 25, 2022

Silicon Photonics verification case study from UC-Davis and Texas A&M

Silicon Photonics 3D integration posed LVS challenges in this fast emerging technical space. A case study describes how the two institutions overcame them.
Article  |  Topics: Verification  |  Tags: , ,   |  Organizations: , ,
October 18, 2021

Three ways to 3D feature at IEDM

Three highlighted papers at IEDM, taking place in December, show the different approaches to the use of the vertical dimension to cut energy use and improve density.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , , ,
September 24, 2021

Siemens brings chip-design flow to DARPA Toolbox Initiative

Siemens EDA has become the first of the major EDA vendors to join the DARPA Toolbox Initiative.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , , , ,
June 15, 2021

Imec cuts transistor gap to less than 20nm with forksheets

Imec showed at VLSI Symposia a process flow that can cut the gap between complementary transistors to less than 20nm.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:

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