As geometries have shrunk, layout-dependent effects in CMOS have become ever more problematic. They are not just popping up in performance but reliability and aging effects as one IEDM presentation showed.
Two leading European research institutes presented their work on the feasibility and cost-effectiveness of monolithic 3D integration at this year's IEDM.
Intel and GlobalFoundries will talk about their post-14nm finFET-based processes at December's IEDM.
The 63rd IEDM has issued a call for papers for its conference in San Francisco in early December and has stuck with the later deadline introduced last year.
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