Samsung Electronics

The upcoming VLSI Symposium will examine progress in using backside contacts and 3D structures to improve density and speed as well as continuing improvements to finFET processes.

Vertical integration is one of the major focus areas at the upcoming IEDM conference, both in terms of transistors and the multiple channels that will go into them.

Backside power delivery could lead to improvements in chip density and more straightforward place-and-route phases according to work presented at this year’s VLSI Symposium.

The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.

Three highlighted papers at IEDM, taking place in December, show the different approaches to the use of the vertical dimension to cut energy use and improve density.

Samsung described at VLSI Symposia how it has used two further forms of stacking to increase flash capacity.

The metal has done sterling service for 20 years but the time is approaching to find a replacement for copper as problems with parasitics continue to build up, work presented at last month’s IEDM shows. But it's not an obvious switch.

IEDM late last year showed how MRAM is being prepared for both FD-SOI and advanced finFET nodes.

Tessent test suite targets automotive, AI and IoT projects that need embedded non-volatile memory.

Concerns that the diplomatic stand-off between Seoul and Tokyo could hit the supply chain rose again this weekend as South Korean politicians made a surprise visit to disputed islands.