Research Groups

As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.

Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.

Imec, TNO, and Cartamundi have developed a low-cost way of letting tags communicate with embedded devices wirelessly by using a capacitive touchscreen.

Different forms of heterogeneous integration take center stage at the IEEE International Electron Device Meeting (IEDM) in December this year.

ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.

The US Quantum Economic Development Consortium is looking to stimulate a supply chain and technology infrastructure for quantum computing, with more about its efforts due to come out in the next few days.

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.

Developing a security assurance standard for IP faces numerous problems but Accellera working-group members are trying to find an answer.

Electronic musician Thomas Dolby will be among the keynote speakers at the 56th Design Automation Conference (DAC) in Las Vegas.

It's been a long time coming, but silicon photonics is now entering commercial design for networking and grabbing attention in autonomous driving and sensors.