FPGA

July 3, 2019
IBM Q

Roadmapping the quantum realm

The US Quantum Economic Development Consortium is looking to stimulate a supply chain and technology infrastructure for quantum computing, with more about its efforts due to come out in the next few days.
June 27, 2019

Building an ecosystem around HLS for AI and ML designs

Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
May 28, 2019

DAC 2019 preview: OneSpin Solutions

OneSpin is bringing recent product launches to DAC and will have technical experts presenting within the conference's Designer Track.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
May 24, 2019

OneSpin extends line-up for AI FPGA and RISC-V verification

The formal specialist is extending its line for Intel FPGAs that target areas such as AI/ML and HPC, and building out a RISC-V suite focused on ISA compliance.
May 21, 2019

Achronix deploys network on chip for faster FPGAs

Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
Article  |  Topics: Blog - IP, PCB  |  Tags: , , , , , , , ,   |  Organizations:
February 21, 2019

DVCon USA 2019 preview: Metrics Technologies

Metrics Technologies demonstrate its cloud-based platform for ASIC and complex FPGA verification and discuss a new partnership with Concept Engineering.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
December 6, 2018

Microchip opts for RISC-V cores in SoC FPGA

Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations: ,
October 17, 2018

FPGA playing verification catch-up as bugs escape

The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
Article  |  Topics: Verification  |  Tags: , , , , , ,   |  Organizations: ,
July 16, 2018

Embedded FPGAs start to take hold in SoC

The embedded FPGA is beginning to find a market, with communications leading the way but machine learning likely to drive further adoption.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
May 11, 2018

Mixed-signal circuits push scaled CMOS at VLSI

The circuits sessions at mid-June's VLSI Symposia in Honolulu feature a number of papers that improve the performance of scaled mixed-signal processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,

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