FPGA

July 26, 2021

Learn how to apply formal verification to safety-critical aviation designs

A detailed technical overview of formal verification within the context of the DO-254 (ED-80) standard is now available to download.
Article  |  Topics: Verification  |  Tags: , , , , , , ,   |  Organizations:
June 9, 2021

Xilinx retools Versal for high-end edge AI

Xilinx has reworked its Versal FPGA for edge-AI applications.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , ,   |  Organizations:
April 16, 2021

Siemens buys formal start-up OneSpin

The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
December 1, 2020

Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)

Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.
November 12, 2019

Xilinx aims for software flow with Vitis

Xilinx has released the first version of its Vitis development environment as the company aims to capture a user base that is more used to software than hardware tools.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations:
July 3, 2019
IBM Q

Roadmapping the quantum realm

The US Quantum Economic Development Consortium is looking to stimulate a supply chain and technology infrastructure for quantum computing, with more about its efforts due to come out in the next few days.
June 27, 2019

Building an ecosystem around HLS for AI and ML designs

Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
May 28, 2019

DAC 2019 preview: OneSpin Solutions

OneSpin is bringing recent product launches to DAC and will have technical experts presenting within the conference's Designer Track.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
May 24, 2019

OneSpin extends line-up for AI FPGA and RISC-V verification

The formal specialist is extending its line for Intel FPGAs that target areas such as AI/ML and HPC, and building out a RISC-V suite focused on ISA compliance.
May 21, 2019

Achronix deploys network on chip for faster FPGAs

Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
Article  |  Topics: Blog - IP, PCB  |  Tags: , , , , , , , ,   |  Organizations:

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