One roadblock to the integration of IP from multiple vendors into an SoC is the likelihood of finding duplicate cell names in the merged design. Carefully considered renaming strategies can fix the problem without causing design database bloat.
The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
Designers need to understand how the architecture of electronic control units used to implement ADAS in vehicles is changing.
Why design data integrity matters from cell design to tapeout. These techniques will help ensure your validation process is as comprehensive as possible.
Achieving ISO 26262 certification for advanced driver assistance systems takes a combination of ASIL ready IP and rigorous development strategies.
The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
By taking a pragmatic approach, the two technology giants have comfortably adopted high-level synthesis and verification - and have shared their experiences.
How to ease AMS verification using tools that improve simulation debug, ease IP integration, and speed design analysis and centering
A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy
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