November 20, 2013
FinFETs for 7nm and below processes will be able to integrate high-mobility III-V materials despite being built on silicon processes, thanks to recent work by imec.
October 4, 2013
Research group CEA-Leti expects to have design kits ready for a 10nm FD-SOI process in June 2014
June 3, 2013
CMOS approaches are likely to underpin electronics for the next century, according to Chenming Hu, father of the finFET
April 10, 2013
US defense research agency DARPA sets targets for cooling overall systems and hot spots in stacked silicon, and backs joint research from Rockwell-Collins and Georgia Tech.
March 27, 2013
With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.
March 22, 2013
Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.
March 19, 2013
STMicroelectronics pushes on with FDSOI despite dissolution of ST-Ericcson joint venture that provided the lead customer for the process.
March 12, 2013
The purchase of Tensilica by Cadence Design Systems could prove the way that EDA and multicore-based system design come together.
February 19, 2013
ISSCC expert panel highlights lowering power over energy sources and identifies the need to focus on the product rather than the technology
December 11, 2012
Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs