July 12, 2022
Thermal-simulation specialist Future Facilities has agreed to be acquired by Cadence Design Systems.
June 28, 2022
CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.
May 28, 2021
Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
June 18, 2020
Waferscale SSDs are among the future drive architectures being explored by Kioxia, according to a keynote delivered at VLSI Symposia.
November 12, 2019
Xilinx has released the first version of its Vitis development environment as the company aims to capture a user base that is more used to software than hardware tools.
July 2, 2019
The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
June 3, 2019
Analyst Rich Valera points to China as a major source of EDA tool growth despite short-term tensions with the US government.
May 28, 2019
Cadence has developed a version of its Protium prototyping engine that supports larger designs and which is intended to go into data-center racks.
May 21, 2019
Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
April 4, 2019
An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.