Analyst: China’s foreign EDA thirst to grow despite trade tensions
Analyst Rich Valera points to China as a major source of EDA tool growth despite short-term tensions with the US government.
data center
Cadence expands Protium for rack-based prototyping
Cadence has developed a version of its Protium prototyping engine that supports larger designs and which is intended to go into data-center racks.
Achronix deploys network on chip for faster FPGAs
Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
ODSA weighs options for chiplet interconnect
An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
Microsoft offers free RTL for fast server compression
Not only has Microsoft decided to make a compression algorithm intended for data centers open source, the company the company is providing its own RTL to anyone who wants to implement it in silicon.
PCI may provide key to OCP chiplet standard
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
MACOM to use GlobalFoundries 300mm SOI for PICs
MACOM has decided to use GlobalFoundries' 90nm SOI process on 300mm wafers to build higher-integration optical-switching devices for servers.
Achronix builds machine learning IP into eFPGA
Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Symphony raises crescendo for AMS simulation
Mentor's updated AMS platform claims performance boost by obviating 'legacy' technology.
56G Ethernet IP to enable leaf-spine hyperscale data centres
Faster PHYs needed to shift vast amounts of data around giant data centres.
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