Altera

March 11, 2016

GSA on how to reinvigorate silicon business models

Open-source hardware, in-field configurability, and a hardware-plus-services approach could protect margins as the IoT hammers down costs, says GSA report.
October 12, 2015

Mentor’s Wally Rhines on M&A ‘merger mania’

...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
June 8, 2015

Altera boosts density and pipelining in finFET FPGA shift

Altera is using a combination of Intel's 14nm process technology and multidie packaging to boost the logic-cell count for its FPGAs, together with a superpipelining strategy to help balance area and clock speed.
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June 2, 2015

Facing a future of dark silicon

Dennard’s Scaling ended years ago and Moore’s Law is slowing down. What will the future hold for the semiconductor industry?
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: ,
June 1, 2015

Server, IoT acceleration on Intel’s mind in Altera buy

Altera has agreed to Intel's offer to buy the company, with FPGAs to be integrated into Xeon processors after 2016. Atoms will join programmable logic in IoT-oriented devices.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , , , , , ,   |  Organizations: , , ,
May 11, 2015

Altera uses hierarchical approach to speed up FPGA compiles

Altera is revamping the Quartus II software for its FPGAs with a mapping and synthesis engine aimed at the upcoming Gen 10 products, as well as adding a C/C++ front-end for system-level design.
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September 30, 2014

Altera moves to 55nm for non-volatile programmable logic

Altera has moved to a 55nm embedded flash process to continue its Max series of non-volatile FPGAs.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , ,   |  Organizations:
August 18, 2014

Power and clocking at 20nm force changes in FPGAs

Design for the 20nm generation of processes has revealed power and clocking issues for the two major FPGA manufacturers presentations at Hot Chips revealed.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: ,
April 24, 2014

Altera finds a way to cheaper floating point in FPGAs

Altera has revealed that the DSP blocks in the Arria 10 FPGAs contain the logic needed to make them work as IEEE754-compliant floating-point units.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
March 27, 2014

Intel and Altera extend foundry deal into interposer and full 3D

Deal quashes rumors that Altera was about to move its cutting edge production back to TSMC, but nor does it appear to be 'exclusive' for 3D products.
Article  |  Topics: Design to Silicon, Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,

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