NVMe over Fabrics (NVMe-oF) extends the memory standard for burgeoning data traffic and the demands of AI and machine learning.
What are the options and how do you balance overarching CAD requirements and personal preferences?
Automating executable specifications as they evolve can deliver major efficiencies.
The Covid-driven MCU shortage for ECUs and elsewhere in vehicle design can bring entire production lines to a halt if not properly managed.
The strategy of designing for best power rather than for best timing in place-and-route delivers better results all around.
Generating accurate ASIL metrics early in the functional safety lifecycle, reduces time-to-certification for ISO26262.
More optimistic about the semiconductor industries prospects than for some time, Siemens Joe Sawicki identified key EDA challenges at DAC.
Pre- and post-processing EDA techniques help streamline design rule checks and delivery efficient waivers to speed design and debug.
PIM memory boosts efficiency by operating on data without moving it to the CPU but realizing this type of novel technology posed power integration and planning challenges.
Innovation is extending the technique's power across areas such as context-aware layout, accounting for multi-patterning and implementing fill.
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