How automated power/ground short checks slash time during implementation
Early detection using design integrity checks during implementation from abstract LEF/DEF inputs can deliver major efficiencies.
IC Implementation
How MaxLinear got faster signoff DRC while optimizing reliability and manufacturability
The RF and AMS specialist turned to design software that allowed it to run design checks during place and route.
System-of-systems validation for automotive design
How Siemens PAVE 360 platform leverages emulation to deliver the exhaustive test required for the incoming generation of autonomous vehicles.
Achieving the interactive development of low-power designs
Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.
Today’s analog/RF designs need interconnect inductance extraction
Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
AI firsts (and more) at America’s SEMICON
SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
Using portable stimulus for automotive random error analysis
The Portable Stimulus Standard helps overcome many of the verification challenges inherent in the strict requirements of ISO 26262.
Getting better results faster with a unified RTL-to-GDSII product
Complex SoCs need systemic optimisation to achieve best time to results, enabled by the use of a unified RTL-to-GDSII flow underpinned by a unified data model.
Correct design and verification coding errors as you type
An IDE designed to catch typographical errors, missing declarations and inconsistent references in your code can hugely reduce your time in debug.
Speed up design and verification with a smaller layout
How to remove or extract portions of a layout for easier, more focused and faster project delivery.
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