Blog Topics

December 9, 2022

Imec adds MOL layer to potentially cut cell size 20%

Adding an MOL layer that takes advantage of a self-aligned pitch-splitting technique and a rotated layout could cut standard-cell height to 4T.
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December 5, 2022

Imec pushes endurance on ferro memory at IEDM

Imec has developed a high-endurance ferroelectric capacitor that could form the basis of storag-class embedded and standalone memories.
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December 1, 2022

Identifying AI opportunities in PCB design

The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
December 1, 2022

Siemens aims to simplify compliance for Linux medical devices

New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
November 23, 2022

Chipletz pushes packaging design for AI, HPC and immersive use-cases

The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
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November 21, 2022

DVCon Europe looks to network effects

Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
November 15, 2022

Real Intent tool looks for glitches

Real Intent has developed a tool to check design and the potential for circuits to glitch.
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November 14, 2022

Semiwise brings cryogenic models to SOI

Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
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October 25, 2022

DVCon Europe keynotes focus on connectivity

DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.
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October 17, 2022

2D advances to take center stage at IEDM

At IEDM, TSMC is at the top of several papers that examine how 2D materials might be put into action as successors to silicon, alongside work from a variety of institutions on power integration and thermal management.
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