Blog Topics

April 1, 2020

Coronavirus Resources: OneSpin Solutions

The verification specialist is adding more online resources to help engineers working from home during the Covid-19 pandemic.
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March 30, 2020

How to update legacy automotive designs for functional safety

Updates to existing designs are often error-prone, though safety tolerances are necessarily tightening. This four-step strategy can help.
March 27, 2020

The 10 ways to automate increasingly complex wire harness design

Wire harness implementations already face tough margins and increasing design pressure from markets such as automotive. Here's how tools can help.
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March 27, 2020

Tackling IR drop and EM with a push-button via utlility

Traditional approaches to via insertion to meet reliability and yield at advanced nodes are giving way to necessary automation.
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March 24, 2020

Feed fake news to hardware hackers

Intel describes active countermeasures for physical attacks at CICC as part of a trend towards more adaptive IoT silicon.
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March 19, 2020

Deploying pre- and post-silicon verification and test for 5G designs

A flexible and still evolving range of 5G standards requires methodologies that can handle massive test.
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March 4, 2020

CEVA splits vectors for more efficient 5G

CEVA has reworked its XC architecture to provide what the company claims is the kind of performance boost needed to handle phase-two 5G applications once Release 17 rolls out.
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March 3, 2020

DVCon US 2020: Coronavirus program changes

DVCon US 2020 is to end a day early as a result of the COVID-19 coronavirus outbreak and released an updated agenda.
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February 28, 2020

Learn how Renesas uses SLEC to enhance its verification flows

A new technical article discusses Renesas' addition of SLEC to its SystemC and RTL flows and the improvements it achieved in time and coverage..
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February 27, 2020

DVCon US 2020 preview: Breker Verification Systems

Portable stimulus pioneer Breker will feature across the DVCon program also highlighting its work with RISC-V.
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