Expert Insights - EDA

Paul Dempsey  |  April 6, 2021

The path to full functional monitoring

Joe Sawicki of Siemens EDA recently addressed the main trends in design delivery from architecture to validation to digital twins - and where they may soon take the industry and its products.
Alieen Ryan  |  March 22, 2021

Silicon lifecycle solutions help you listen to your chip

SLS brings the power of product lifecycle management to the increasingly complex oversight challenges in electronic systems design.
Tom Anderson  |  December 10, 2020

e language users deserve IDE support too

With features that keep it in current use such as aspect-oriented programming, the e language can leverage integrated design environments. Learn how.
Dina Medhat  |  October 16, 2020

Not using reliability check waivers? You’re wasting valuable time

Reliability rule checks need - and now get - more granular analysis that allows designers to adopt proposed waivers with much greater confidence.
Topics: EDA - DFM  |  Tags: , , , , , ,   |  Organizations:   |  
Tom Anderson  |  September 25, 2020

Extract benefit from the automated refactoring of VHDL code

VHDL has come a long way in terms of complexity. An integrated development environment helps you deliver better and more compliant code quickly.
Ashish Darbari  |  September 7, 2020

Everything you ever wanted to know about RISC-V architectural formal verification

But you were NOT afraid to ask.... It's time for some answers.
Hend Wagieh  |  August 25, 2020

Creating a new paradigm for circuit verification

How Calibre is evolving to address the challenges of LVS verification in early-stage design.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
John Ferguson  |  August 14, 2020

EDA innovation is the foundation of progress

For physical verification and beyond, each process node requires new thinking, new tools and greater performance.
Topics: EDA - DFM, Verification  |  Tags: , , , , , , , ,   |  Organizations:   |  
Tom Anderson  |  August 12, 2020

How IDEs enable the ‘shift left’ for VHDL

Learn how an IDE offers on-the-fly, auto-correct and informed analysis of VHDL code to speed project quality and delivery.
Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:   |  
Jay Jahangiri  |  July 28, 2020

Catch the next wave in DFT automation

It is easier than ever to build a flexible, resilient, and end-to-end hierarchical DFT flow with smart automation.
Topics: EDA - DFT  |  Tags:   |  Organizations: ,   |  

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