Expert Insights - EDA

Jay Jahangiri  |  July 28, 2020

Catch the next wave in DFT automation

It is easier than ever to build a flexible, resilient, and end-to-end hierarchical DFT flow with smart automation.
Topics: EDA - DFT  |  Tags:   |  Organizations: ,   |  
Matthew Walsh  |  July 9, 2020

Don’t get lost in the cloud

Mentor is rolling out an comprehensive cloud-based design infrastructure feeding into digital twin strategies.
Topics: Digital Twin, EDA Topics, PCB Topics  |  Tags: , ,   |  Organizations: , ,   |  
Tom Anderson  |  June 2, 2020

VHDL users also deserve efficient design and verification

More commonly associated with SystemVerilog, IDEs can also greatly help users of the popular HDL for FPGA, mil/aero and other designs.
Topics: EDA Topics, EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
Lauro Rizzatti  |  May 29, 2020

Covid-19 rings changes for virtual working

Virtualization is becoming ever more common during the Covid-19 outbreak, even for complex technologies like emulation, and showing its strengths.
Ron Press  |  April 24, 2020

How to gain a competitive edge with advanced DFT

Learn how the latest design for test innovations deliver efficiency and profitability across the design flow.
Adnan Hamid  |  February 20, 2020

Verifying AI engines

How can we refine our approach functional verification to deal with the increasing number of systems that leverage artificial intelligence.
Tom Anderson  |  January 19, 2020

Accelerate your UVM adoption and usage with an IDE

How an integrated design environment can help you overcome complexities within the Universal Verification Methodology and manage the size of the libraries within it.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations: ,   |  
Jean-Marie Brunet and Lauro Rizzatti  |  December 17, 2019

System-of-systems validation for automotive design

How Siemens PAVE 360 platform leverages emulation to deliver the exhaustive test required for the incoming generation of autonomous vehicles.
Raghav Katoch  |  November 22, 2019

Improve your LVS debug productivity

A look at ways to improve LVS debug productivity on complex SoCs through more narrowly targeted debug strategies.
Tom Anderson  |  November 21, 2019

Accelerating the adoption of portable stimulus

The vision of portable stimulus is to find a way to write tests that can be portable ‘vertically’ from IP block to subsystem to system, and ‘horizontally’ from simulation to emulation to silicon. However, applying portable stimulus to real chip designs is not trivial.
Topics: EDA - Verification  |  Tags: ,   |  Organizations: ,   |  

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