EDA Topics

Interactive checks mean faster, more accurate symmetry verification

Symmetry verification for analog and custom IC needs to evolve beyond current time-consuming and hard-to-use techniques.

Topics/Categories: EDA Topics, EDA - Verification
Fly the friendly skies with automated CDC verification for DO-254

CDC-related metastability is hard to catch by hand and processes are error prone. Tools offer a more comprehensive approach.

Topics/Categories: EDA Topics, EDA - Verification
A quick and easy way to calculate P2P resistance and current density

Coordinate-based checking provides a streamlined way to verify designs around ESD before full-chip runs without the need for custom checks.

Topics/Categories: EDA - DFM, Verification
Why comprehensive memory layout verification needs automated reliability checks

Because of the high analog content in memory designs, designers must understand how various effects impact reliability and performance.

Topics/Categories: EDA - Verification

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