EDA Topics
-
Connect SystemC models using UVM Connect
Learn how UMVC helps bridge between SystemC and System Verilog using transaction level modeling for test and library efficiency.
-
Interactive checks mean faster, more accurate symmetry verification
Symmetry verification for analog and custom IC needs to evolve beyond current time-consuming and hard-to-use techniques.
-
Fly the friendly skies with automated CDC verification for DO-254
CDC-related metastability is hard to catch by hand and processes are error prone. Tools offer a more comprehensive approach.
-
A quick and easy way to calculate P2P resistance and current density
Coordinate-based checking provides a streamlined way to verify designs around ESD before full-chip runs without the need for custom checks.
DFM
DFT
- Expert Insight Give the people what they want: toward making 3D IC mainstream
- Expert Insight Toward usable and scalable DFT for 3D IC design
- Expert Insight Silicon lifecycle solutions help you listen to your chip
ESL
IC Implementation
- Expert Insight How to migrate SoC design to the cloud
- Expert Insight Give the people what they want: toward making 3D IC mainstream
- Article Putting it all together to accelerate 3D IC design
Verification
- Expert Insight Shift left to tackle key O-RAN verification challenges
- Expert Insight How to migrate SoC design to the cloud
- Expert Insight Reliability verification simplified for multi-power domain designs
PLATINUM SPONSORS



View All Sponsors