August 23, 2021
Aiming for a primarily physical event in the fall, organisers of the 2021 IEDM have published the tutorial and short-core schedule.
June 4, 2021
TSMC is developing processes for high-end automotive and RF based off its N5 and N7 families.
December 15, 2020
Imec's senior vice president of CMOS outlined future directions for the technology over the coming decade.
August 25, 2020
TSMC is using its growing experience with EUV lithography to fill in sub-nodes between its major releases as it prepares to extend finFET technology to the forthcoming N3 process.
May 26, 2020
Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
August 27, 2019
GlobalFoundries is calling for imports of chips fabbed by TSMC into the US and Germany in multiple actions based on a list of 16 patents.
February 28, 2019
Graphcore has licensed IP from Belgium-based Sofics to protect its Colossus GC2 processors from ESD.
August 28, 2018
GlobalFoundries has decided to put development of its 7nm process on the backburner and focus on its existing finFET and FD-SOI processes.
June 25, 2018
Foundries have taken aim at standard-cell track height and design-rule tweaks to try to improve the area efficiency and performance of derivative finFET processes.
June 21, 2018
Samsung Electronics expects to increase savings on die area in the shift from its 10nm to 7nm node by applying both EUV for critical layers and several layout-focused process changes.