Tech Design Forum
Briefing
productivity
productivity
May 2, 2017
Wally Rhines looks beyond ‘endless verification’ to the system era
DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
Article | Topics:
Blog Topics
,
Conferences
,
Blog - EDA
,
- ESL/SystemC
,
Standards
,
Verification
| Tags:
automotive
,
clock domain crossing
,
deadlock
,
DO254
,
formal verification
,
IEC60601
,
ISO26262
,
productivity
,
security
,
systemc
,
SystemVerilog
,
traceability
,
UVM
,
x propagation
| Organizations:
DVCon China
,
Mentor Graphics
,
Siemens EDA
,
Wilson Research Group
June 2, 2014
Mentor’s Wally Rhines on tools as a cultural issue
Whether you're going to DAC this week or not, it's worth remembering one of the other key factors that will inform your judgments on new tools.
Article | Topics:
Commentary
,
Conferences
,
Design to Silicon
,
Digital/analog implementation
,
Blog - EDA
,
Embedded
,
- ESL/SystemC
,
RTL
,
Standards
,
Tested Component to System
,
Verification
| Tags:
hardware/software co-design
,
productivity
| Organizations:
Mentor Graphics
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