GlobalFoundries

October 29, 2019

Foundries call off patent war

GlobalFoundries and TSMC have called off their legal battle with a wide-ranging patent cross-licensing deal.
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August 27, 2019

GlobalFoundries takes aim at TSMC’s customers in patent action

GlobalFoundries is calling for imports of chips fabbed by TSMC into the US and Germany in multiple actions based on a list of 16 patents.
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April 4, 2019

ODSA weighs options for chiplet interconnect

An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
March 18, 2019

PCI may provide key to OCP chiplet standard

The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
December 12, 2018

IEDM shows progress on embedded eMRAM

Embedded magnetic RAM is emerging as a contender for on-chip memory not just from a density standpoint but from that of power.
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November 6, 2018

Netronome launches chiplet initiative for network-accelerator SIPs

Data-center networking specialist Netronome has recruited a number of silicon makers and IP suppliers to a standard for chiplet designs that can be used in SIPs for edge computers and servers.
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August 28, 2018

GlobalFoundries stops 7nm work to focus on existing processes

GlobalFoundries has decided to put development of its 7nm process on the backburner and focus on its existing finFET and FD-SOI processes.
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July 12, 2018

With RF, power and MRAM, FD-SOI finds its role

FD-SOI is gradually building up a presence as a technology not just for low-power but RF and power integration.
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June 25, 2018

Node-variant FinFET tweaks try to improve cost, performance

Foundries have taken aim at standard-cell track height and design-rule tweaks to try to improve the area efficiency and performance of derivative finFET processes.
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June 22, 2018

GlobalFoundries plays with metal gear in search for solid gains

At VLSI Symposia 2018, GlobalFoundries researchers proposed looking at the metal-gate ‘gear’ ratio as a way of improving the routability of standard cells.
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