Research Groups

March 22, 2013

DATE: Silicon Europe plans to build cluster of clusters

Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,
March 19, 2013

FD-SOI costs to match bulk by year end, says ST

STMicroelectronics pushes on with FDSOI despite dissolution of ST-Ericcson joint venture that provided the lead customer for the process.
Article  |  Topics: Blog Topics, Conferences  |  Tags: , , , , , ,   |  Organizations: ,
March 12, 2013

EDA sets sail in a ‘sea of processors’

The purchase of Tensilica by Cadence Design Systems could prove the way that EDA and multicore-based system design come together.
February 19, 2013

ISSCC 2013: Energy harvesting needs to prioritize

ISSCC expert panel highlights lowering power over energy sources and identifies the need to focus on the product rather than the technology
Article  |  Topics: Blog Topics, Blog - EDA, Embedded  |  Tags: , ,   |  Organizations:
December 11, 2012

FD-SOI vs finFETs mulled during IEDM

Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs
December 10, 2012

Oxygen injection for go-faster 14nm transistors

Mears Technologies and UC Berkeley describe at IEDM 2012 how oxygen in a silicon superlattice could boost performance beyond strained silicon at 14nm.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: ,
December 10, 2012

Germanium finFETs, TFETs and MEMS modelled at IEDM

The modelling track at IEDM 2012 showed how germanium could be used in 14nm finFETs. Other work focused on tunnel FETs and analyzing MEMS using Spice.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , , ,
October 16, 2012

EDA and IP vendors roll out support for TSMC’s 20nm, 3DIC processes

IP and EDA vendors line up to support TSMC 20nm process, CoWoS 3DIC technology
October 5, 2012

IEF: Process kits for processes that don’t yet exist

Designers should plan ahead for future process changes as conventional silicon CMOS runs out of steam, IMEC's Rudy Lauwereins told delegates at the International Electronics Forum in Bratislava this week.
Article  |  Topics: Conferences, Design to Silicon, Blog - EDA  |  Tags: , , ,   |  Organizations:

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