EDA

January 22, 2021

How to use virtual mode in emulation

Virtual strategies make for greater productivity and widen the number of emulation use cases. A new paper considers some of the most popular examples.
January 19, 2021

Design house recommends earlier start to flip-chip bump layout

Design-services company Sondrel is recommending teams start earlier on package design to avoid delays after IC tapeout.
Article  |  Tags: , ,   |  Organizations:
January 15, 2021

Copper’s future is troubled but it’s likely to stick around

The metal has done sterling service for 20 years but the time is approaching to find a replacement for copper as problems with parasitics continue to build up, work presented at last month’s IEDM shows. But it's not an obvious switch.
December 21, 2020

Plasmonics may point way to faster interchip comms

Work by the University of Toronto and Arm presented at IEDM indicates plasmonics could be a viable contender for high-speed chip-chip communications.
December 18, 2020

Backside metal defends against IR drop and side-channel attacks

Work presented at IEDM 2020 shows taking advantage of the IC backside for power and ground for the additional area can deliver further benefits for IR drop and security.
December 18, 2020

Virtual emulation delivers verification for the latest storage devices

Computational storage devices are posing a new raft of challenges that is being addressed using a powerful pre-silicon methodology.
December 17, 2020

Arm expands cloud migration on Arm-based machines at AWS

Arm is pushing more work onto Arm servers in the AWS cloud as it encourages EDA vendors to port their tools to the architecture.
Article  |  Tags: ,   |  Organizations: ,
December 15, 2020

Chipmaking’s new environment presented at IEDM

Imec's senior vice president of CMOS outlined future directions for the technology over the coming decade.
Article  |  Tags: , , , , , ,   |  Organizations:
December 14, 2020

Mentor rebrands as Siemens EDA

Mentor, a Siemens business, has rebranded as Siemens EDA, almost almost four years after the EDA company was acquired.
Article  |  Tags: , ,   |  Organizations:
December 11, 2020

OSVVM updates go into Riviera-Pro

Aldec updates tools to add support for the latest release of the VHDL verification methodology.
Article  |  Tags: , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors