EDA

July 1, 2020

Sigasi creates SDK for custom editors

Sigasi has launched a software kit to provide inhouse tools builders and EDA vendors with a way to build in code-editing features.
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June 24, 2020

IEDM switches to virtual format for 2020

The organizers of the 66th annual IEDM have decided to hold the December conference virtually.
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June 18, 2020

Kioxia looks to waferscale flash drives for fast, low-cost storage

Waferscale SSDs are among the future drive architectures being explored by Kioxia, according to a keynote delivered at VLSI Symposia.
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June 18, 2020

How Ambarella met the demands of automotive DFT

Even experienced IC design houses must adopt innovative and emerging strategies to meet functional safety and other demands of ISO 26262 for automotive systems.
June 16, 2020

Transistor stacks piled high at VLSI

As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.
June 9, 2020

Real Intent tries to shift left on DFT

Real Intent has launched a DFT tool intended to relax the bottlenecks that occur as an SoC project moves into its final phase ahead of tapeout.
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May 28, 2020

IEDM plans for San Francisco in December

The IEEE plans to stage the 66th International Electron Device Meeting as a physical event in mid-December.
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May 26, 2020

DVCon 2020 to repeat sessions online

DVCon US is to repeat sessions online from today until the middle of August, with exclusive access to registered attendees through early June.
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May 26, 2020

Nanometer scaling puts focus on power at VLSI in June

Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
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May 22, 2020

Parasitic extraction to guide capacitor usage in RF SoCs

A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.
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