The automotive market faces challenges that make it a prime candidate for the greater use of high-level synthesis on designs with AI and ML content.
A new whitepaper describes some of the techniques you can use to get the most out of cloud-based DRC with Calibre.
Safety verification calls for increased collaboration across the supply chain, experts say. The challenge is finding ways to make that happen.
Reset domain crossing is another area where rising SoC complexity and IP reuse is causing an increase in reliability and safety challenges.
Konica Minolta describes how it has constructed a C++ signoff flow that mitigates code ambiguity, manual analysis and other inefficiencies.
A new paper describes an alternative to increasingly inefficient manual ESD verification that reduces risks of respins and missed delivery deadlines.
Mentor's Joe Sawicki talks to TDF about the growing importance of system-level simulation and the long-term impact of AI and cloud on EDA.
Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
AMD used Calibre with optimisations implemented for cloud support to slash runtimes on high-end server processor designs.
Wally Rhines, CEO Emeritus of Mentor, a Siemens business, delivered a bullish prognosis for the semiconductor and EDA sectors in a talk at the beginning of the Design Automation Conference in Las Vegas this week.
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