Siemens EDA

Mil/aero specialist Abaco Systems refined its workflow across multiple design sites after the pandemic constrained collaboration.

PCB routing is best served by a mixture of manual and automated tasks. A new e-book describes the boundaries between the two.

The flat nature of traditional IC packaging design struggles to cope with the chiplet era. Homogeneous disaggregation offers an alternative.

The technique is becoming increasingly important for designs that need to be flexible, compact and lightweight.

DTCO (design technology co-optimization) looks to address systemic verification challenges but the process still needs to be extended.

Make it easier to capture issues in 2.5D and 3D designs with multiple chiplets and emerging challenges with this 'shift left' approach.

How the various features within today's Calibre physical verification family help designers shift left tasks and cut time-to-market.

Arm is working with Cadence and Siemens on separate projects to support its plans in the SDV space.

A new paper looks at examples for using The Boundary Condition Independent Reduced Order Model (BCI-ROM) in its VHDL-AMS implementation for electro-thermal analysis.

Solido discusses how it has leveraged AI for SPICE level efficiency and the benchmarks it has used.