Originally presented at DVCon Europe, a new paper automates complex steps in RDC verification and reduces noise.
Computational storage devices are posing a new raft of challenges that is being addressed using a powerful pre-silicon methodology.
Mentor, a Siemens business, has rebranded as Siemens EDA, almost almost four years after the EDA company was acquired.
Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)
Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.
Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
Mentor is packaging a range of software IP, reference designs, and technical help as VCO2S, for Vehicle Cockpit Consolidation Solutions.
Mentor's latest additions to Tessent aim to cut test time by a factor of four but remains tailored for increasing design complexity.
The free-to-attend user meetings for Mentor clients will retain the same format mixing technical presentations with keynotes and networking.
Functional verification for increasingly complex ARM-based designs is at the heart of the new consultancy partnership.
View All Sponsors