Embedded

August 31, 2022

Intel and partners join for RISC-V development push

Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.
June 30, 2022

Siemens and Nvidia aim to bring more virtual reality to digital twins

Siemens and Nvidia have agreed to work more closely together to drive the development of higher-fidelity digital twins.
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June 28, 2022

Aachen spinout claims fastest RISC-V simulator

MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.
May 25, 2022

Siemens brings ReadyStart RTOS to RISC-V

Siemens has expanded its Nucleus ReadyStart program to the RISC-V architecture.
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August 31, 2021

Connected cars call for safety islands

A Siemens Tessent white papers examines the role of safety islands in advanced automotive systems.
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July 16, 2021

How to meet formal embedded software guidance for medical devices

Vulnerabilities in connected healthcare products have led medical requlators to issue further security recommendations for their design and maintenance.
June 9, 2021

Xilinx retools Versal for high-end edge AI

Xilinx has reworked its Versal FPGA for edge-AI applications.
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May 28, 2021

Would you prefer a hypervisor or a multicore framework?

Determining which embedded technique to adopt is more than just a question of what cores the system has.
March 31, 2021

Arm looks to explore new realms for security with v9

Arm aims to introduce a novel security model in its upcoming v9 architecture along with further extensions for AI.
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March 29, 2021

OpenHW gets free simulator from Imperas

Imperas Software has released a free instruction set simulator that covers the OpenHW Group's implementations of the RISC-V processor architecture.
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