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Implementing high performance, low power Bluetooth Low Energy interfaces in SoCs

A look at the complexiites of implementing a Bluetooth Low Eenergy interface in an SoC.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Achieving the interactive development of low-power designs

Tom Anderson is a technical marketing consultant working with multiple EDA vendors, including AMIQ EDA. His previous roles have included vice president of marketing at Breker Verification Systems, vice president of applications engineering at 0-In Design Automation, vice president of engineering at IP pioneer Virtual Chips, group director of product management at Cadence, and director of technical marketing at Synopsys. He holds a Master of Science degree in Computer Science and Electrical Engineering from M.I.T. and a Bachelor of Science degree in Computer Systems Engineering from the University of Massachusetts at Amherst.

Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.

Dina Medhat

An easier way to make reliability rules and checks more consistent

Learn how XML-based constraints can standardize rule development and use with coding examples for the Calibre PERC reliability platform.

Richard Pugh

Emulation makes it possible to stay on the road to autonomous vehicles

Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.

EDA

  1. Hossam Sarhan, Mentor, a Siemens business
    Expert Insight Today’s analog/RF designs need interconnect inductance extraction

    Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.

  2. Expert Insight AI firsts (and more) at America’s SEMICON
  3. Expert Insight Using portable stimulus for automotive random error analysis

PCB

  1. ECAD-MCAD collaboration - featured image
    Article The necessity and benefits of ECAD-MCAD collaboration for PCB design

    Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.

  2. Expert Insight Enabling the move to a system-centric view
  3. Article Tackling the design challenges of PCIe 5.0

IP

  1. Article Introduction to the Compute Express Link (CXL) device types

    A look at the device types defined by the Compute Express Link (CXL) standard.

  2. Article Introducing the Compute Express Link (CXL) standard: the hardware
  3. Article Focus your use of Portable Stimulus on three key axes

Embedded

  1. Featured Image - Colin Walls feature- July 2019
    Article Enabling embedded multicore systems with multiple OSes and critical goals

    Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.

  2. Expert Insight The vocal persuader
  3. Article Understanding DDR SDRAM memory choices

Briefing

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