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ECAD-MCAD collaboration - featured image

The necessity and benefits of ECAD-MCAD collaboration for PCB design

Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Ashish Darbari

A new formal proof kit for RISC-V processors

Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal describes a strategy developed by his company Axiomise to apply formal verification proofs to open-source processor for safety, security and reliability.

The vocal persuader

In conversation with author and SEMICON West/ES Design West keynoter Bob Pearson on the challenges facing tech on external and internal communication.

Tom Anderson

A helping hand for design and verification

Integrated design environments and features within them such as auto-complete deliver valuable efficiencies for input, verification and debut.

EDA

  1. Dennis Joseph is a technical marketing engineer supporting Calibre interfaces in the Design-to-Silicon division of Mentor, a Siemens business. His primary focus is the support and enhancement of the Calibre DESIGNrev layout viewer. Dennis received an M.S. in Electrical and Computer Engineering from the University of Florida.
    Expert Insight Speed up design and verification with a smaller layout

    How to remove or extract portions of a layout for easier, more focused and faster project delivery.

  2. Expert Insight Why hyperlinks are essential for HDL debugging
  3. Expert Insight How emulation’s virtual mode boosts productivity: Part Two

PCB

  1. Expert Insight Enabling the move to a system-centric view

    Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.

  2. Article Tackling the design challenges of PCIe 5.0
  3. Article How Channel Operating Margin helps Gigabit Ethernet PCB analysis

IP

  1. Article Understanding DDR SDRAM memory choices

    This article explains which form of DRAM memory is best for your SoC application, comparing DDR variants, types of DIMM, mobile and low-power versions, graphics memory and 3D stacks.

  2. Expert Insight High-level synthesis for AI: Part One
  3. Article Using advanced IP to build SoCs for hyperscale data centres

Embedded

  1. Article Accelerating the implementation of application-specific processors

    Application-specific processors can provide high performance for specialised tasks at low energy cost.

  2. Article Optimizing the hardware implementation of machine learning algorithms
  3. Article The antifuse advantage for one-time programmable non-volatile memory

Briefing

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