Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
It's the fiftieth International Test Conference this year. How much has been achieved and how much more work is there to do to ensure that we can keep building chips that do what they are supposed to?
Why developing an IoT design environment demands an integrated, top-down design flow that combines AMS, digital, RF, photonics, and MEMS design and verification tools.
Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.
Expert Insight Emulation makes it possible to stay on the road to autonomous vehicles
Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.
- Expert Insight Today’s analog/RF designs need interconnect inductance extraction
- Expert Insight AI firsts (and more) at America’s SEMICON
Article The necessity and benefits of ECAD-MCAD collaboration for PCB design
Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.
- Expert Insight Enabling the move to a system-centric view
- Article Tackling the design challenges of PCIe 5.0
Article Introduction to the Compute Express Link (CXL) device types
A look at the device types defined by the Compute Express Link (CXL) standard.
- Article Introducing the Compute Express Link (CXL) standard: the hardware
- Article Focus your use of Portable Stimulus on three key axes
Article Enabling embedded multicore systems with multiple OSes and critical goals
Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.
- Expert Insight The vocal persuader
- Article Understanding DDR SDRAM memory choices
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