Latest

Implementing high performance, low power Bluetooth Low Energy interfaces in SoCs

A look at the complexiites of implementing a Bluetooth Low Eenergy interface in an SoC.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Ron Press

International Test Conference celebrates 50 years of advancing test technology

Ron Press is the technology enablement director of the Tessent product family at Mentor, A Siemens Business. He is a member of the International Test Conference (ITC) Steering Committee, a Golden Core member of the IEEE Computer Society, and a Senior Member of the IEEE.

It's the fiftieth International Test Conference this year. How much has been achieved and how much more work is there to do to ensure that we can keep building chips that do what they are supposed to?

Sandra Kupperman

Efficient IoT system design for AMS, MEMS and photonics designs

Why developing an IoT design environment demands an integrated, top-down design flow that combines AMS, digital, RF, photonics, and MEMS design and verification tools.

Achieving the interactive development of low-power designs

Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.

EDA

  1. Richard Pugh featured image SSD expert insight
    Expert Insight Emulation makes it possible to stay on the road to autonomous vehicles

    Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.

  2. Expert Insight Today’s analog/RF designs need interconnect inductance extraction
  3. Expert Insight AI firsts (and more) at America’s SEMICON

PCB

  1. ECAD-MCAD collaboration - featured image
    Article The necessity and benefits of ECAD-MCAD collaboration for PCB design

    Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.

  2. Expert Insight Enabling the move to a system-centric view
  3. Article Tackling the design challenges of PCIe 5.0

IP

  1. Article Introduction to the Compute Express Link (CXL) device types

    A look at the device types defined by the Compute Express Link (CXL) standard.

  2. Article Introducing the Compute Express Link (CXL) standard: the hardware
  3. Article Focus your use of Portable Stimulus on three key axes

Embedded

  1. Featured Image - Colin Walls feature- July 2019
    Article Enabling embedded multicore systems with multiple OSes and critical goals

    Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.

  2. Expert Insight The vocal persuader
  3. Article Understanding DDR SDRAM memory choices

Briefing

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