Latest

Introducing the Compute Express Link (CXL) standard: the hardware

A guide to the emerging Compute Express Link (CXL) standard, which links CPUs and accelerators in heterogenous computing environments.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

John Blyler

AI firsts (and more) at America’s SEMICON

John Blyler is a Consulting Editor of Tech Design Forum and the Editor-in-Chief of Interference Technology. He spent the first half of his career as a hardware-system systems engineer and program managerand the second half as a technology journalist, science writer and educator. John is an affiliate professor of systems engineering at Portland State University and lecturer for UC-Irvine’s online IoT program.

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.

Adnan Hamid

Using portable stimulus for automotive random error analysis

The Portable Stimulus Standard helps overcome many of the verification challenges inherent in the strict requirements of ISO 26262.

Tom Anderson

Take advantage of the automated refactoring of design and verification code

Refactoring saves time and resuources by converting code to a common format and eliminates redundancies to make it more readable and maintainable.

EDA

  1. Article Getting better results faster with a unified RTL-to-GDSII product

    Complex SoCs need systemic optimisation to achieve best time to results, enabled by the use of a unified RTL-to-GDSII flow underpinned by a unified data model.

  2. Expert Insight Achieving more efficient hierarchical DFT for Arm subsystems
  3. Expert Insight Spreading the word on formal in Bangalore

PCB

  1. ECAD-MCAD collaboration - featured image
    Article The necessity and benefits of ECAD-MCAD collaboration for PCB design

    Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.

  2. Expert Insight Enabling the move to a system-centric view
  3. Article Tackling the design challenges of PCIe 5.0

IP

  1. Article Ensuring system-level security of complex SoCs

    Using a hardware root of trust and a secure development lifecycle process to form the basis of a better approach to developing and implementing more secure complex SoCs.

  2. Article Focus your use of Portable Stimulus on three key axes
  3. Article Understanding DDR SDRAM memory choices

Embedded

  1. Featured Image - Colin Walls feature- July 2019
    Article Enabling embedded multicore systems with multiple OSes and critical goals

    Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.

  2. Expert Insight The vocal persuader
  3. Article Accelerating the implementation of application-specific processors

Briefing

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors