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EDA

  1. Dennis Joseph is a technical marketing engineer supporting Calibre interfaces in the Design-to-Silicon division of Mentor, a Siemens business. His primary focus is the support and enhancement of the Calibre DESIGNrev layout viewer. Dennis received an M.S. in Electrical and Computer Engineering from the University of Florida.
    Expert Insight Speed up design and verification with a smaller layout

    How to remove or extract portions of a layout for easier, more focused and faster project delivery.

  2. Expert Insight Why hyperlinks are essential for HDL debugging
  3. Expert Insight How emulation’s virtual mode boosts productivity: Part Two

PCB

  1. Expert Insight Enabling the move to a system-centric view

    Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.

  2. Article Tackling the design challenges of PCIe 5.0
  3. Article How Channel Operating Margin helps Gigabit Ethernet PCB analysis

IP

  1. Article Understanding DDR SDRAM memory choices

    This article explains which form of DRAM memory is best for your SoC application, comparing DDR variants, types of DIMM, mobile and low-power versions, graphics memory and 3D stacks.

  2. Expert Insight High-level synthesis for AI: Part One
  3. Article Using advanced IP to build SoCs for hyperscale data centres

Embedded

  1. Article Accelerating the implementation of application-specific processors

    Application-specific processors can provide high performance for specialised tasks at low energy cost.

  2. Article Optimizing the hardware implementation of machine learning algorithms
  3. Article The antifuse advantage for one-time programmable non-volatile memory

Briefing

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