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Managing code coverage to achieve verification closure in low-power SoCs

A look at some of the key techniques needed to ensue good code coverage during the verification of low-power SoC designs.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Puneet Sinha

Vehicle autonomy and electrification: a perfect match

Puneet Sinha

Is it worth building sophisticated autonomous driving systems if their power consumption reduces an electric vehicle's range? Maybe yes.

Raghav Katoch

Improve your LVS debug productivity

A look at ways to improve LVS debug productivity on complex SoCs through more narrowly targeted debug strategies.

Tom Anderson

Accelerating the adoption of portable stimulus

The vision of portable stimulus is to find a way to write tests that can be portable ‘vertically’ from IP block to subsystem to system, and ‘horizontally’ from simulation to emulation to silicon. However, applying portable stimulus to real chip designs is not trivial.

EDA

  1. Ron Press is the technology enablement director of the Tessent product family at Mentor, A Siemens Business. He is a member of the International Test Conference (ITC) Steering Committee, a Golden Core member of the IEEE Computer Society, and a Senior Member of the IEEE.
    Expert Insight International Test Conference celebrates 50 years of advancing test technology

    It’s the fiftieth International Test Conference this year. How much has been achieved and how much more work is there to do to ensure that we can keep building chips that do what they are supposed to?

  2. Expert Insight Efficient IoT system design for AMS, MEMS and photonics designs
  3. Expert Insight Achieving the interactive development of low-power designs

PCB

  1. ECAD-MCAD collaboration - featured image
    Article The necessity and benefits of ECAD-MCAD collaboration for PCB design

    Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.

  2. Expert Insight Enabling the move to a system-centric view
  3. Article Tackling the design challenges of PCIe 5.0

IP

  1. Article Implementing high performance, low power Bluetooth Low Energy interfaces in SoCs

    A look at the complexiites of implementing a Bluetooth Low Eenergy interface in an SoC.

  2. Article Introduction to the Compute Express Link (CXL) device types
  3. Article Introducing the Compute Express Link (CXL) standard: the hardware

Embedded

  1. Featured Image - Colin Walls feature- July 2019
    Article Enabling embedded multicore systems with multiple OSes and critical goals

    Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.

  2. Expert Insight The vocal persuader
  3. Article Understanding DDR SDRAM memory choices

Briefing

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