Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
Learn more about the Infinera design that took top place at the this year's PCB Technology Leadership Awards.
With features that keep it in current use such as aspect-oriented programming, the e language can leverage integrated design environments. Learn how.
From maker to enterprise user, apply these seven critieria to get the best PCB design tool for your project.
Article Resolving IP cell-name conflicts peacefully
One roadblock to the integration of IP from multiple vendors into an SoC is the likelihood of finding duplicate cell names in the merged design. Carefully considered renaming strategies can fix the problem without causing design database bloat.
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Article The five pillars of digital transformation for electronics system design
Digitalization unites domains and processes to master the complexity of electronic systems design. Successful strategies share key qualities.
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Article How to use runtime monitoring for automotive functional safety
The promise of autonomous vehicles is driving profound changes in the design and testing of automotive ICs.
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Expert Insight Implementing medical device security for optimal outcomes
Describing a security strategy that pulls on best practices and standards to ensure medical device approval and the best patient outcomes.
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