Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
The Portable Stimulus Standard helps overcome many of the verification challenges inherent in the strict requirements of ISO 26262.
Article Getting better results faster with a unified RTL-to-GDSII product
Complex SoCs need systemic optimisation to achieve best time to results, enabled by the use of a unified RTL-to-GDSII flow underpinned by a unified data model.
- Expert Insight Take advantage of the automated refactoring of design and verification code
- Expert Insight Achieving more efficient hierarchical DFT for Arm subsystems
Article The necessity and benefits of ECAD-MCAD collaboration for PCB design
Collaboration across the electrical and mechanical domains leverages more tightly integrated and highly featured tools with richer data formats for greater accuracy and shorter time-to-market.
- Expert Insight Enabling the move to a system-centric view
- Article Tackling the design challenges of PCIe 5.0
Article Introduction to the Compute Express Link (CXL) device types
A look at the device types defined by the Compute Express Link (CXL) standard.
- Article Introducing the Compute Express Link (CXL) standard: the hardware
- Article Focus your use of Portable Stimulus on three key axes
Article Enabling embedded multicore systems with multiple OSes and critical goals
Embedded multicore systems require engineers to make choices around the hardware and software architectures, approaches to certification and more. This is a guide to the trade-offs involved and how to best leverage your options.
- Expert Insight The vocal persuader
- Article Understanding DDR SDRAM memory choices
View All Sponsors