Latest

US featim

Want to improve your user experience? Adopt a UX maturity model

A deep dive into the adoption, selection and implementation of models that boost productivity and customer loyalty.

Guides

  • NAND flash

    IP - Technologies

    NAND flash is a key technology for all systems. 3D techniques now control its cost and potential for future capacity increases.

  • Interconnect resistance

    EDA - Techniques

    A number of effects have led to a dramatic increase in interconnect resistance in the sub-32nm process nodes that demands the use of smarter routing.

  • Real-number or wreal modeling

    EDA - Techniques

    Real-valued modelling provides a way of speeding up the simulation of SoCs with significant analog content through the use of discrete-event solvers.

Expert Insights

Neel Natekar

Simplify and accelerate PV debug using default results data views

Neel Natekar is a senior product engineer in the Design to Silicon division of Siemens Digital Industries Software. Prior to joining Siemens, Neel worked as a design engineer focusing on power delivery solutions for custom CPUs. He received a B.Eng. in Electronics and Telecommunications from the University of Mumbai, and an M.S. in Electrical Engineering, Circuits and Microsystems from the University of Michigan.

Standard physical verification (PV) check reviews within EDA tools can reduce time-to-tapeout and mitigate risk.

Jeff Wilson

Improved power management and faster time to market?

We have the technology. Learn how to 'shift left' with Calibre DesignEnhancer and meet IR, EM and PPA objectives.

Matt Walsh

Welcome to the part model era

Standards-based digital threads will revolutionize design through part models that deliver trust, traceability and context across components.

EDA

  1. IJTAG standards progress - featured image
    Article Refreshing the IEEE 1687 IJTAG family for today’s designs

    Learn more about how the IJTAG family and associated standards are being enhanced for current challenges.

  2. Expert Insight Shift left to tackle key O-RAN verification challenges
  3. Expert Insight How to migrate SoC design to the cloud

PCB

  1. Connectivity Management Feature - Jan 23
    Article Putting it all together to accelerate 3D IC design

    Learn how connectivity management solutions help you manage the multiple formats in which 3D IC components are delivered.

  2. Expert Insight A three-phase strategy to master the supply chain tsunami
  3. Expert Insight May the Cloud be with you

IP

  1. 3D IC workflow democratization
    Expert Insight Give the people what they want: toward making 3D IC mainstream

    Learn more about the five interconnected workflows that are democratizing next generation design in the emerging chiplet age.

  2. Article Formal verification for SystemC/C++ designs
  3. Article Resolving IP cell-name conflicts peacefully

Embedded

  1. Jeff Hancock is a Senior Product Manager in the Embedded Platform Technology Business Unit of Mentor, A Siemens Business. He oversees the Nucleus and Mentor Embedded Hypervisor runtime product lines, as well as associated middleware and professional services.
    Expert Insight Keeping up with rapid innovation in cockpit domain controllers

    Automotive cockpit design is being driven forward by prevailing trends in the wider market.

  2. Expert Insight Use digitalization to mitigate the automotive MCU shortage
  3. Expert Insight Implementing medical device security for optimal outcomes

Briefing

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors