Nanometer scaling puts focus on power at VLSI in June
Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
Qualcomm
GlobalFoundries takes aim at TSMC’s customers in patent action
GlobalFoundries is calling for imports of chips fabbed by TSMC into the US and Germany in multiple actions based on a list of 16 patents.
Increased cooperation seen as vital for automotive safety verification
Safety verification calls for increased collaboration across the supply chain, experts say. The challenge is finding ways to make that happen.
User2User Silicon Valley is two weeks away
Mentor's technical conference will take place on May 2 at the Santa Clara Marriott and feature more than 45 user and vendor presentations.
Case study: Achieving earlier signoff convergence and a ‘shift left’ for P&R at Qualcomm
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Verification engineers embrace emulation for the shift left
In a panel session at June's DAC, Synopsys customers talked about some of the ways they make verification more efficient and bring technologies such as formal, emulation, and simulation together.
Fusion improves timing say Synopsys users
Early-access customers talked about their experiences with the Synopsys Fusion-based flow in a panel session at the DAC.
EDA needs to work on the back end, says Qualcomm
It’s the back-end that needs work as system-level considerations begin to dominate design, Qualcomm’s vice president of engineering said at DAC.
Node-variant FinFET tweaks try to improve cost, performance
Foundries have taken aim at standard-cell track height and design-rule tweaks to try to improve the area efficiency and performance of derivative finFET processes.
7nm process with EUV to feature at VLSI
Samsung Electronics will describe at the upcoming VLSI Symposia how its engineers have applied EUV to a variety of layers in a 7nm finFET process.
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