July 18, 2022
As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
October 27, 2021
In a panel at this week’s DVCon Europe, experts described a number of issues facing teams looking to incorporate machine learning in logic verification flows and why some of those efforts will not pay off while others succeed.
May 26, 2020
Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
August 27, 2019
GlobalFoundries is calling for imports of chips fabbed by TSMC into the US and Germany in multiple actions based on a list of 16 patents.
August 6, 2019
Safety verification calls for increased collaboration across the supply chain, experts say. The challenge is finding ways to make that happen.
April 18, 2019
Mentor's technical conference will take place on May 2 at the Santa Clara Marriott and feature more than 45 user and vendor presentations.
November 14, 2018
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
July 27, 2018
In a panel session at June's DAC, Synopsys customers talked about some of the ways they make verification more efficient and bring technologies such as formal, emulation, and simulation together.
July 3, 2018
Early-access customers talked about their experiences with the Synopsys Fusion-based flow in a panel session at the DAC.
June 27, 2018
It’s the back-end that needs work as system-level considerations begin to dominate design, Qualcomm’s vice president of engineering said at DAC.