May 26, 2020
Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
June 11, 2015
For DAC 2015, Invionics set itself the challenge of developing a custom tool in 48 hours based on votes for ideas provided by visitors to the show.
June 5, 2015
Embedded SRAM IP said to reduce dynamic, static power on FDSOI at cost of extra 10% area