A three-pronged digital twin strategy can help aviation and defense companies master increasing complexity in electrical implementations.
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
The avionics design assurance guidance has its own flavor of verification which needs to be understood alongside its definition of validation.
A new CDC methodology uses automation and data hooks to improve a notoriously lengthy and tricky task - verifying synchronizers.
ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.
Breker's work towards the portable stimulus roll-out will lead much of its offering later this month in San Jose.
UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.
Free book explains virtual prototyping and includes case studies about virtual prototyping from Altera, Bosch, GM, Hitachi, Lauterbach, Linaro, Microsoft, Renesas, Ricoh, Siemens, and TI.
As DVCon begins, we interview Cadence's Qi Wang, who has led its efforts to converge the Common Power Format with its rival as the IEEE1801 standard is revamped.
The verification challenge is best addressed by a combination of highly targeted tools, according to Pranav Ashar, CTO of Real Intent.
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