design security

July 14, 2021

Accellera approves IP security-documentation standard

Accellera has approved version 1.0 of the SA-EDI standard, intended to provide a consistent way of describing security concerns for IP cores.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
April 7, 2021

Accellera publishes security standard draft

Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
April 9, 2019

DAC announces first set of keynotes for 2019

Electronic musician Thomas Dolby will be among the keynote speakers at the 56th Design Automation Conference (DAC) in Las Vegas.
July 20, 2018

Why the time has come for cloud-based emulation

Mentor has untethered its Veloce platform online because it feels more designs need emulation and the cloud can now support it.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , ,   |  Organizations:
March 19, 2018

Accellera begins IP security-assurance standards effort

Accellera Systems Initiative has begun a project that may result in the creation of a standard to address security assurance for semiconductor IP cores.
Article  |  Topics: Blog - IP  |  Tags: ,   |  Organizations:
October 23, 2017

Arm plans secure reference architecture for Cortex-M

Arm is putting together a security framework that the company is assembling to support, at least initially, IoT devices based on the Cortex v8M architecture.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations:
January 8, 2016

Prpl Foundation proposes security architecture

The Prpl Foundation has published a guide to techniques it claims will improve the security of embedded systems.
June 11, 2015

Data mining tools trawl for IC icebergs

Dassault Systèmes and IC Manage have each developed "big data" mining software tools to track the progress of chip-design projects
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: ,
June 9, 2015

Debug life cycle expands with on-chip infrastructure

By widening the range of resources that can be tracked within an SoC, Ultrasoc says it has uncovered ways to make debug a long-term tool for complex multicore designs.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , ,   |  Organizations:
May 21, 2015

OneSpin uses app-store approach to open up formal verification

Formal-verification specialist OneSpin is setting up its own equivalent of an app store, building on top of a formal engine the company now licenses to other companies.

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