functional verification

February 28, 2023

Imperas and Synopsys team on RISC-V debug

Imperas is integrating its ImperasDV verification IP with the VCS simulator and Verdi debug tools.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
September 15, 2022

Cadence extends AI to verification data with unified database

Cadence has brought the inputs for its AI-driven tools under the umbrella of a big-data collection platform and added functional verification to the list of products that use machine learning.
August 3, 2022

Imperas releases RISC-V coverage library as open source

Imperas Software has published an open-source functional-coverage library for RISC-V cores.
July 14, 2022

‘Shocking’ quality sees vendors organize around RISC-V verification

Three EDA vendors team up to create stronger verification flow for RISC-V processor implementations.
April 7, 2021

Accellera publishes security standard draft

Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
March 18, 2021

DVCon to stick with virtual for Europe as US event highlights paper award

The best paper awards at this month's DVCon highlighted techniques to streamline verification. The European version in the meantime is looking for paper submissions.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: ,
November 19, 2020

Version 2 draft of portable stimulus standard goes up for public review

Accellera Systems Initiative has published for open review version 2.0 of the Portable Test and Stimulus standard.
Article  |  Topics: Blog - EDA  |  Tags: ,   |  Organizations:
October 28, 2020

DVCon keynoters look to software for verification optimization ideas

Speakers at this year's DVCon Europe called on the hardware community to find inspiration in software-development trends.
October 22, 2020

Mentor and Arm collaborate on RTL verification reviews

Functional verification for increasingly complex ARM-based designs is at the heart of the new consultancy partnership.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , ,   |  Organizations: ,
June 4, 2019

The unknown unknowns of secure devices

Developing a security assurance standard for IP faces numerous problems but Accellera working-group members are trying to find an answer.

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