Nanometer scaling puts focus on power at VLSI in June
Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
DVFS
The road to ES Design West: Design Pavilion
ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.
Sonics adds heat-aware DVFS to SoC power controller
Sonics has developed a version of its power-management IP core for SoCs that adds support for dynamic voltage and frequency scaling, along with the ability to tune settings according to temperature.
Sonics readies fine-grained power-gating architecture
Sonics is moving into power management with an approach intended to substantially automate much of the job of building finely grained power-gated SoCs.
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