X-Fab adds galvanic isolation to CMOS process
X-Fab has made it possible to put galvanic isolation based on capacitive coupling directly into chips made on its XA035 process.
cmos
Transistor stacks piled high at VLSI
As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.
CMOS “good for another century,” says father of finFET
CMOS approaches are likely to underpin electronics for the next century, according to Chenming Hu, father of the finFET
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