AI

October 7, 2021

Combined database underpins 3DIC design suite

Cadence has built a unified database to support a group of tools to support the planning and implementation of 3DIC designs.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations:
August 5, 2021

Keynotes for DVCon Europe announced

DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: ,
May 28, 2021

PCIe 6.0 gets verification IP as formal arrival approaches

Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
Article  |  Topics: Blog - EDA, IP, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
December 18, 2020

Virtual emulation delivers verification for the latest storage devices

Computational storage devices are posing a new raft of challenges that is being addressed using a powerful pre-silicon methodology.
November 3, 2020

Tessent Streaming Scan Network to shrink SoC test writing and runtimes

Mentor's latest additions to Tessent aim to cut test time by a factor of four but remains tailored for increasing design complexity.
Article  |  Topics: Blog Topics  |  Tags: , , , , ,   |  Organizations: , ,
September 14, 2020

nVidia commits to buy Arm from Softbank

Graphics and AI specialist nVidia has been confirmed as the buyer of Arm from Softbank Vision Fund in a transaction worth up to $40bn, with the fund retaining a 10 per cent share in Arm if the deal completes.
Article  |  Topics: Blog - IP  |  Tags: , , , , , ,   |  Organizations: ,
April 29, 2020

Arm extends free access to core designs for startups

Arm has put together a program based on its existing Flexible Access model that is intended to provide early-state startups with a broader list of cores they can prototype before needing to take out a full licence.
Article  |  Topics: Blog - IP  |  Tags: , , , , ,   |  Organizations:
April 23, 2020

Balancing PPA as machine learning moves to the edge

High-level synthesis is playing another important role in the matching of AI algorithms to necessarily application-specific designs.
February 19, 2020

Embedded World 2020 preview: Mentor

Six papers, a dedicated automotive sessions and demos including the use of the Nucleus for RISC-V are among highlights in Mentor's Embedded World agenda.
February 12, 2020

AI processor company opts for Analog FASTSPICE and Symphony

Mythic will use the Mentor tools for its analog-targeted intelligence processing units.

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