DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.
The recent Verification Futures Europe conference looked at what AI, from decision trees to foundation models, could do to speed up RTL checks.
At the recent VLSI Symposium, Google vice president Parthasarathy Ranganathan described the importance of co-design and the software stack in its data-center designs.
Semidynamics has released a customizable vector unit with out-of-order execution support to accompany its 64bit RISC-V processor cores.
A comprehensive review of ML's potential and its current use identifies challenges ahead.
Processor IP company will incorporate custom instructions and other changes in its superscalar core, which includes a novel memory unit for sparse matrices.
Cadence Design Systems has expanded its use of machine learning for EDA into PCB design, joining a growing number of suppliers who have decided it is a sector that needs the AI treatment.
As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
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