machine learning

April 22, 2019

Machine learning and chiplets headline VLSI Symposia

Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: , ,
April 9, 2019

DAC announces first set of keynotes for 2019

Electronic musician Thomas Dolby will be among the keynote speakers at the 56th Design Automation Conference (DAC) in Las Vegas.
April 4, 2019

ODSA weighs options for chiplet interconnect

An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
April 2, 2019

Catapult HLS integrates eFPGA IP for faster development

Menta eFPGA IP is highly configurable making it well suited to the evolving designs that exploit HLS abstraction.
Article  |  Topics: Blog - EDA, - HLS, Blog - IP  |  Tags: , , , , ,   |  Organizations: ,
March 12, 2019

Free registration opens for DAC

The Design Automation Conference (DAC) has kicked off free registration for the exhibit floor at early June's Las Vegas event.
February 25, 2019

China Focus 2: The Design Dilemma

Do China's ambitions as a world-class innovator face fundamental challenges as a result of the sector's existing economic infrastructure?
February 15, 2019

China Focus 1: Wally Rhines maps startup and design growth

In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
February 6, 2019

Safety and test IP heads for automotive AI applications

Automotive AI specialist FABU has licensed a portfolio of IP from Synopsys to help assemble ISO 26262-compliant SoCs
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
January 22, 2019

HPC futures report puts acceleration first

A report put together by Europe's HiPEAC high-performance computing research network argues computing is at an architectural turning point
December 4, 2018

Achronix builds machine learning IP into eFPGA

Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:

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