March 13, 2024
DVCon Europe is looking for papers to be presented at this year’s event in mid-October.
January 12, 2024
Workshops on portable stimulus, functional safety, verification of RISC-V processors, and design with chiplets and large language models will feature at the upcoming 2024 DVCon US.
November 22, 2023
Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
November 6, 2023
Cadence has linked several machine-learning approaches to build a tool that is designed to speed up the detection and diagnosis of on-chip power-integrity issues.
October 31, 2023
Imperas Software has worked with AI specialist Tenstorrent to create and distribute a model of the Ascalon processor core.
September 6, 2023
DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.
July 11, 2023
The recent Verification Futures Europe conference looked at what AI, from decision trees to foundation models, could do to speed up RTL checks.
July 4, 2023
At the recent VLSI Symposium, Google vice president Parthasarathy Ranganathan described the importance of co-design and the software stack in its data-center designs.
June 1, 2023
Semidynamics has released a customizable vector unit with out-of-order execution support to accompany its 64bit RISC-V processor cores.
May 30, 2023
A comprehensive review of ML's potential and its current use identifies challenges ahead.