machine learning

January 12, 2024

DVCon gears up for March in San Jose

Workshops on portable stimulus, functional safety, verification of RISC-V processors, and design with chiplets and large language models will feature at the upcoming 2024 DVCon US.
Article  |  Topics: Blog - EDA  |  Tags: , , ,
November 22, 2023

Arm gives Helium to low-end Cortex-M core

Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations:
November 6, 2023

Cadence combines ML techniques for power signoff

Cadence has linked several machine-learning approaches to build a tool that is designed to speed up the detection and diagnosis of on-chip power-integrity issues.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
October 31, 2023

Imperas builds model of Tenstorrent AI core

Imperas Software has worked with AI specialist Tenstorrent to create and distribute a model of the Ascalon processor core.
September 6, 2023

HPC and AI provide keynote focus at DVCon Europe

DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
July 11, 2023

AI’s possible roles in verification covered at VF2023

The recent Verification Futures Europe conference looked at what AI, from decision trees to foundation models, could do to speed up RTL checks.
July 4, 2023

Co-design underpins infrastructure acceleration at Google

At the recent VLSI Symposium, Google vice president Parthasarathy Ranganathan described the importance of co-design and the software stack in its data-center designs.
June 1, 2023

Semidynamics adds flexible vectors to RISC-V cores

Semidynamics has released a customizable vector unit with out-of-order execution support to accompany its 64bit RISC-V processor cores.
Article  |  Topics: Blog - IP  |  Tags: , , , , ,   |  Organizations:
May 30, 2023

Charting the path for machine learning in functional verification

A comprehensive review of ML's potential and its current use identifies challenges ahead.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
April 17, 2023

Semidynamics pushes configurability on RISC-V core for HPC

Processor IP company will incorporate custom instructions and other changes in its superscalar core, which includes a novel memory unit for sparse matrices.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations: ,

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