Arm has used machine-learning tools supplied by the Solido group at Siemens Digital Industries Software to speed up IP validation runtime a thousand-fold compared to conventional statistical methods.
The program for the 58th Design Automation Conference, which returns to a physical format in December, is online and is running its I Love DAC promotion for free access until the end of this month.
Cadence has organized its machine-learning platforms into three families intended to cover a wide range of on-device AI applications.
DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.
At the VLSI Symposia, researchers described how AI hardware could help dramatically accelerate analog and digital design and not all of it directly through machine learning.
Xilinx has reworked its Versal FPGA for edge-AI applications.
Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
Latest acquisition adds technologies to mitigate rising verification time and cost for third-party IP.
The Linley Spring Conference saw several vendors present architectures that they claim can deliver more performance to edge systems than what are now traditional approaches.
View All Sponsors