Real Intent tool looks at paths to hardware vulnerability
Real Intent has developed a tool for identifying potential security issues in chip designs at the sign-off stage.
hacking
Fault simulator tackles intrusive hacks
Optima DA has turned its high-throughput fault-simulation technology to the checking protections against aggressive, intrusive hacks.
IP partnership aims to crack down on physical hacks
UltraSoC and Agile Analog have teamed up to build an infrastructure that can help guard against physical attacks on SoCs.
Accellera adds detail to proposed security assurance model
Accellera's security assurance working group has set out some of its plans in a white paper.
The unknown unknowns of secure devices
Developing a security assurance standard for IP faces numerous problems but Accellera working-group members are trying to find an answer.
Arm adds tamper resistance to M-series core
Arm aims to bring protection against physical tampering and side-channel attacks into processor cores designed for IoT nodes, starting with one of its M-series designs.
Leakage analysis checks IP cores against crypto vulnerability
The Athena Group says it has developed countermeasures against side-channel attacks for its IP that offer the best protection currently available.
Intel’s security architect lays out protection plan
At DAC 2014, Intel’s chief security architect Ernie Brickell described the processor maker’s approach to protecting hardware and software from hacks and attacks.
Do not trust the cores, Trojans
If someone put a piece of RTL into your SoC designed to leak information to the outside world, or simply kill the device stone dead, could you spot it?
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