5nm

August 25, 2020

TSMC fills in sub-nodes as EUV gains ground

TSMC is using its growing experience with EUV lithography to fill in sub-nodes between its major releases as it prepares to extend finFET technology to the forthcoming N3 process.
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June 24, 2020

IEDM switches to virtual format for 2020

The organizers of the 66th annual IEDM have decided to hold the December conference virtually.
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June 16, 2020

Transistor stacks piled high at VLSI

As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.
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June 15, 2020

EDA in the cloud boosts DRC iterations for AMD

AMD worked with Microsoft and Azure to cut DRC runtimes and control memory usage for a 7nm cloud-based design.
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June 10, 2020

Onchip sensors aim for finer-granularity heat measurements

Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.
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May 28, 2020

IEDM plans for San Francisco in December

The IEEE plans to stage the 66th International Electron Device Meeting as a physical event in mid-December.
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July 2, 2019

The road to ES Design West: Location, location, location

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.
December 12, 2018

IEDM shows progress on embedded eMRAM

Embedded magnetic RAM is emerging as a contender for on-chip memory not just from a density standpoint but from that of power.
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May 23, 2018

Pillar transistor points to smaller SRAMs at 5nm

Imec and Unisantis Electronics have developed a process flow based on a vertical transistor with a gate on all sides they claim will lead to denser memories on a 5nm node.
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May 22, 2018

IEDM 2018 aims to span quantum, neuromorphic and CMOS devices

IEDM has issued a call for papers for its 2018 conference, expecting to cover devices and circuit interactions in neuromorphic, quantum and conventional computing.
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