Foundry

October 5, 2023

Vertical integration expands at IEDM

Vertical integration is one of the major focus areas at the upcoming IEDM conference, both in terms of transistors and the multiple channels that will go into them.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
June 1, 2023

X-Fab introduces BCD-on-SOI at 110nm

X-Fab Silicon Foundries claims to be the first with a foundry offering for 110nm BCD-on-SOI technology, aimed primarily at automotive designers.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:
April 4, 2023

Curvilinear layout looks to wider adoption with mask speedups

Nvidia's move into software aimed at mask production and EDA looks to be part of a wider shift to improve yields.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: , , ,
October 17, 2022

2D advances to take center stage at IEDM

At IEDM, TSMC is at the top of several papers that examine how 2D materials might be put into action as successors to silicon, alongside work from a variety of institutions on power integration and thermal management.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations: , ,
June 20, 2022

3DIC design needs more hierarchy, TSMC says

TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
June 4, 2021

TSMC spins outs processes for automotive and RF

TSMC is developing processes for high-end automotive and RF based off its N5 and N7 families.
Article  |  Topics: Blog Topics  |  Tags: , , , , , ,   |  Organizations:
June 3, 2021

Three libraries tune speed and density on TSMC’s 3nm process

TSMC will provide three different standard-cell libraries for its upcoming finFET-based 3nm process to cover requirements from high-density mobile to high-performance computing, allowing tradeoffs for area and circuit frequency.
Article  |  Topics: Blog - EDA, - HPC, Blog - IP  |  Tags: , ,   |  Organizations:
January 15, 2021

Copper’s future is troubled but it’s likely to stick around

The metal has done sterling service for 20 years but the time is approaching to find a replacement for copper as problems with parasitics continue to build up, work presented at last month’s IEDM shows. But it's not an obvious switch.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: , , , ,
August 25, 2020

TSMC fills in sub-nodes as EUV gains ground

TSMC is using its growing experience with EUV lithography to fill in sub-nodes between its major releases as it prepares to extend finFET technology to the forthcoming N3 process.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , , ,   |  Organizations: ,
July 29, 2020

Litho hotspot analysis gets machine-learning turbocharge

A Mentor-Samsung collaboration cuts the need for model-based analysis and speeds analysis runtime by as much as 20X.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors