Foundry

LSG generates random design-like test vehicles to enable more detailed pre-ramp analysis for incoming nodes.

X-Fab has added a process module to its wide voltage- and temperature-range 180nm mixed-signal process that supports a set of transistors with lower 1/f flicker noise.

Intel and GlobalFoundries will talk about their post-14nm finFET-based processes at December's IEDM.

GlobalFoundries intends to offer a 12nm FinFET process as a stepping stone from its 14nm process.

ARM, Xilinx, Cadence Design Systems, and TSMC have agreed to produce a test chip for the CCIX project.

Sonics has developed a version of its power-management IP core for SoCs that adds support for dynamic voltage and frequency scaling, along with the ability to tune settings according to temperature.

TSMC encapsulated the multiple chips assembled on a 1200mm2 silicon substrate to cut the chance of damage from warping with the company's CoWoS2 SiP technology.

Synopsys has released details on its varied activities at DAC 2017, ranging from panels to technical papers.

Among the papers at this year's VLSI Symposia in Hawaii in June, Samsung will describe a 7nm CMOS process that uses EUV lithography to tighten up device features on minimum-pitch interconnects.

Racyics has kicked off a hosted-design service to make it easier for startups and researchers to access the 22nm FD-SOI process offered by GlobalFoundries.