IEEE

October 1, 2019

Low-power pioneer to receive 2019 Kaufman Award

Mary Jane Irwin of Penn State University has been named as the first female recipient of the Phil Kaufman Award for contributions to electronic design.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: ,
May 13, 2019

Security, machine learning, and variety at DAC

Security and machine learning are two topics that take center stage at DAC this year, says the conference’s general chair Rob Aitken.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , ,   |  Organizations: , ,
February 12, 2019

IEDM looks to spin glasses and brain-like platforms

IEDM plans to expand its range of coverage for the 2019 event to encompass a range of novel computing platforms, from neuromorphic architectures to machines that emulate thermodynamic systems.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
May 22, 2018

IEDM 2018 aims to span quantum, neuromorphic and CMOS devices

IEDM has issued a call for papers for its 2018 conference, expecting to cover devices and circuit interactions in neuromorphic, quantum and conventional computing.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
March 21, 2018

VLSI Symposia adds day for AI

June's Symposia on VLSI Technology & Circuits will bring together a number of industry trends that extend from implantable biomedical applications to machine learning and cloud computing under the banner of technologies for ‘smart living’.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
December 6, 2017

Learn how to simplify power states in UPF

UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.
Article  |  Topics: Blog - EDA, - Standards, Verification  |  Tags: , , ,   |  Organizations: , , ,
January 9, 2017

VLSI Symposia issue calls for papers

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
October 24, 2016

7nm finFET process techniques lead IEDM lineup

At the 62nd annual IEDM taking place in early December two of the leading groups in process development will take the wraps off their 7nm finFET technologies.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
July 22, 2016

IEDM alters schedule to keep abreast of process updates

The International Electron Device Meeting has pushed back the deadline for its papers to get the latest developments in process and device design into the December conference.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
September 30, 2015

Vertical structures to debut at IEDM 2015

A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors