July 8, 2020
In a panel session at VLSI Symposia, AMD described how the economics have come down strongly in favor of multichip integration for multicore server processors.
May 21, 2019
Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
April 22, 2019
Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.
April 4, 2019
An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
March 18, 2019
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
November 6, 2018
Data-center networking specialist Netronome has recruited a number of silicon makers and IP suppliers to a standard for chiplet designs that can be used in SIPs for edge computers and servers.