Packaging

The flat nature of traditional IC packaging design struggles to cope with the chiplet era. Homogeneous disaggregation offers an alternative.

South Korea's leading research institute has built a reusable flow for lower power petaflops-performance AI.

Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.

The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.