Siemens automates test to handle multi-die 2.5D, 3D and 5.5D architectures
Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.
interconnect
Copper’s future is troubled but it’s likely to stick around
The metal has done sterling service for 20 years but the time is approaching to find a replacement for copper as problems with parasitics continue to build up, work presented at last month’s IEDM shows. But it's not an obvious switch.
Plasmonics may point way to faster interchip comms
Work by the University of Toronto and Arm presented at IEDM indicates plasmonics could be a viable contender for high-speed chip-chip communications.
Arm TechCon 2017 preview: Synopsys
Synopsys' line-up at next week's ARM TechCon includes joint presentations with Huawei and Nvidia.
ARM eases interconnect, debug, third-party IP integration for SoCs
Technology from Duolog acquisition used to ease the configuration of interconnect, debug and trace - and the integration of third-party IP
Latest ITRS underlines slowdown in interconnect and IC scaling
The 2013 edition of the International Technology Roadmap for Semiconductors has been published. The latest set of tables underlines the slowdown in some aspects of scaling, particularly when it comes to metal interconnect.
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