Nvidia revealed at its Fall GTC work the company has done on a bidirectional energy-saving chiplet interconnect that could hit the equivalent of 50Gbit/s per line.
Cadence has brought the inputs for its AI-driven tools under the umbrella of a big-data collection platform and added functional verification to the list of products that use machine learning.
X-Fab is using IHP technology to add a 130nm silicon germanium process to its offering.
Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.
Accellera is on the first stage of setting up a working group to create a standard for exchanging information on clock domain crossing checks.
Teledyne e2v has demonstrated a prototype optical link that the company believes could replace electrical signaling for remote RF heads.
As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
Siemens and Nvidia have agreed to work more closely together to drive the development of higher-fidelity digital twins.
R&D multicore processor demonstrates programmable extensions for DSP.
CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.
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