Chipmaker

July 27, 2021

ST makes its first 200mm SiC wafers

STMicroelectronics has made its first silicon carbide wafers that can be run on a 200mm line.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
July 22, 2021

Arm shows off biggest flex processor so far

Arm and flexible-electronics specialist PragmatIC have demonstrated a 32bit processor implemented on a plastic substrate.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
July 19, 2021

Chiplet design raises big questions

Building products using chiplets involves more than treating them as hard IP cores. Many open questions surround the field, explored by panelists in a MEPTEC conference online.
Article  |  Topics: Blog - EDA, IP, PCB  |  Tags: , , , ,   |  Organizations: , , ,
June 16, 2021

Samsung moves further into 3D for denser flash

Samsung described at VLSI Symposia how it has used two further forms of stacking to increase flash capacity.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
June 9, 2021

Xilinx retools Versal for high-end edge AI

Xilinx has reworked its Versal FPGA for edge-AI applications.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , ,   |  Organizations:
May 28, 2021

PCIe 6.0 gets verification IP as formal arrival approaches

Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
Article  |  Topics: Blog - EDA, IP, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
May 26, 2021

Arm rolls clickthrough license scheme into Flexible Access

Arm is reworking the DesignStart scheme it introduced several years, moving it under the umbrella of the broader Flexible Access program.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:
May 20, 2021

Denser DRAM looks to flash for inspiration

Unisantis aims to use its vertical transistor design in a novel form of DRAM that could improve density four-fold.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
May 14, 2021

How MaxLinear cut physical verification time with in-design DRC

A case study describes how the RF and AMS specialist achieved efficiencies on a complex server DSP SoC project by running as-you-go DRC during place and route.
May 2, 2021

Alternative scaling approaches form VLSI 2021 technology highlights

The upcoming VLSI Symposia will feature a number of papers that show the ways in which novel approaches are going to be needed to continue scaling.

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