Chiplets will need models to guarantee heterogenous SiP implementation. A cross-industry working group describes its progress so far.
Nvidia says it will support the UCIe chiplet interface standard once it has "stabilized" while opening up its latest form of NVLink to other companies.
A panel at DVCon argued too much of a focus on point tools coupled with challenges with interoperability and cross-industry cooperation is hindering the ability of SoC teams to design and verify complex products.
Nvidia has decided to give up on acquiring Arm from SoftBank. The IP provider will now aim for an IPO by the end of March 2023.
At December's Design Automation Conference, AMD senior vice president Sam Naffziger provided more insights into the chipmaker’s use of chiplet-based design and manufacture.
FHE use-cases are evolving and the NextFlex consortium is looking to smooth their path with a strategy, PDKs and reference modules.
Breker will highlight its latest work on stress-testing processor, storage and I/O architectures during DAC 2021 this week.
DAC 2021 is looming and here is our first round up of a major EDA player's plans for the physical event in San Francisco.
A £6.5m grant will fund the development of memories and other IP to improve the control of qubits in quantum computers.
Emulation capacity and its scalability is a major issue for large SoC designs, said panelists at DVCon Europe.
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